Devices having a semiconductor material that is semimetal in bulk and methods of forming the same

1. A method comprising:

forming a first source/drain contact region;

forming a first gate electrode over the first source/drain contact region and over a substrate;

forming a first opening through the first gate electrode to the first source/drain contact region;

forming a first gate dielectric along a first sidewall of the first opening;

depositing a first bismuth-containing semiconductor material in the first opening to form a first bismuth-containing channel structure, the first gate dielectric being disposed between the first gate electrode and the first bismuth-containing channel structure, the first bismuth-containing channel structure being connected to the first source/drain contact region;

forming a second source/drain contact region over and connected to the first bismuth-containing channel structure; and

crystallizing the first bismuth-containing semiconductor material, the crystallizing comprising performing an anneal.

2. The method of claim 1 , wherein the depositing the first bismuth-containing semiconductor material comprises doping the first bismuth-containing semiconductor material with a p-type dopant or an n-type dopant during the depositing the first bismuth-containing semiconductor material.

3. The method of claim 1 , wherein the anneal has a temperature greater than 271.4° C. and less than or equal to 400° C.

4. The method of claim 1 further comprising:

forming a third source/drain contact region over the second source/drain contact region;

forming a second gate electrode over the third source/drain contact region;

forming a second opening through the second gate electrode to the third source/drain contact region;

forming a second gate dielectric along a second sidewall of the second opening;

depositing a second bismuth-containing material in the second opening to form a second bismuth-containing channel structure, the second gate dielectric being disposed between the second gate electrode and the second bismuth-containing channel structure, the second bismuth-containing channel structure being connected to the third source/drain contact region; and

forming a fourth source/drain contact region over and connected to the second bismuth-containing channel structure,

wherein the crystallizing the first bismuth-containing semiconductor material further crystallizes the second bismuth-containing material, the anneal being performed after the forming the fourth source/drain contact region.

5. The method of claim 4 further comprising forming an interconnect structure between the second source/drain contact region and the third source/drain contact region.

6. A method comprising:

forming a first source/drain contact over a substrate;

forming a dielectric layer over the first source/drain contact;

forming an opening in the dielectric layer to the first source/drain contact, the opening having a sidewall extending above the first source/drain contact;

forming a gate dielectric along the sidewall of the opening;

depositing a bismuth-containing semiconductor material in the opening to form a bismuth-containing channel structure, the gate dielectric being disposed between the opening and the bismuth-containing channel structure;

forming a second source/drain contact connected to and over the bismuth-containing channel structure; and

crystallizing the bismuth-containing semiconductor material.

7. The method of claim 6 , wherein the bismuth-containing semiconductor material is monocrystalline.

8. The method of claim 6 , wherein the bismuth-containing semiconductor material comprises a dopant.

9. The method of claim 6 , wherein the crystallizing comprises performing an anneal.

10. A method comprising:

forming a first transistor, the first transistor comprising a first bismuth-containing channel structure, the first bismuth-containing channel structure comprising a first doping profile;

forming a second transistor, the second transistor comprising a second bismuth-containing channel structure, the second bismuth-containing channel structure comprising a second doping profile, the second doping profile complementary to the first doping profile;

forming a first interconnect structure over the second bismuth-containing channel structure; and

crystallizing the first bismuth-containing channel structure and the second bismuth-containing channel structure.

11. The method of claim 10 , wherein the crystallizing is performed using a thermal anneal.

12. The method of claim 11 , wherein the thermal anneal comprises a temperature greater than 271.4° C. and less than or equal to 400° C.

13. The method of claim 10 , further comprising, before forming the first transistor and the second transistor, forming a second interconnect structure over a substrate, wherein forming the first transistor and the second transistor comprises forming the first transistor and the second transistor over the second interconnect structure.

14. The method of claim 13 , further comprising forming a first source/drain contact region over the second interconnect structure.

15. The method of claim 14 , wherein the first bismuth-containing channel structure is connected to the first source/drain contact region.

16. The method of claim 15 , further comprising forming a second source/drain contact region over and connected to the first bismuth-containing channel structure.

17. The method of claim 16 , further comprising forming a second gate electrode, a third source/drain contact region over the second interconnect structure.

18. The method of claim 17 , further comprising forming a fourth source/drain contact region above and electrically connected to the second bismuth-containing channel structure.

19. The method of claim 18 , wherein the second bismuth-containing channel structure is connected to the third source/drain contact region.

20. The method of claim 19 , wherein the fourth source/drain contact region contacts the second bismuth-containing channel structure.