Interconnect structure, printed circuit board, semiconductor device, and manufacturing method for interconnect structure
An interconnect structure in which the current capacity of an interconnect pattern involving a large amount of current is increased without preventing the miniaturization of signal lines and increasing the film thickness. The interconnect structure includes a resin layer; and interconnects formed on the resin layer, wherein the resin layer has a plurality of parallel grooves in an area in which the interconnects are formed, and the interconnects are formed of a plating film created on a resin layer front surface in the area, in which the interconnects are formed, and on inner wall surfaces of the plurality of grooves.
1. An interconnect structure including:
a resin layer; and
interconnects formed on the resin layer, wherein
the resin layer has a plurality of grooves in an area in which the interconnects are formed, the grooves being formed in the front surface of the resin layer, extending in a direction parallel to the front surface of the resin layer and are parallel to each other and
the interconnects are formed of a plating film created on a resin layer front surface in the area, in which the interconnects are formed, and on inner wall surfaces of the plurality of grooves.
2. A printed circuit board including the interconnect structure according to claim 1 .
3. A semiconductor device including the interconnect structure according to claim 1 .
4. The semiconductor device according to claim 3 , wherein the interconnects constituting the interconnect structure are in direct contact with a front surface of a semiconductor chip.
5. A manufacturing method for an interconnect structure, the method including:
a step of forming a plurality of grooves in a front surface of a resin layer in an area in which interconnects are formed, the grooves extending in a direction parallel to the front surface of the resin layer and are parallel to each other; and
a step of forming a plating film on a resin layer front surface in an area in which the interconnects are formed and on inner wall surfaces of the plurality of grooves.