IP Library Granted Patent US 9,905,624
Granted Patent B2
US 9,905,624 · App. 15/433,007 · Granted Feb 27, 2018

Light emitting device

Inventors: Makoto Udagawa (Kanagawa, JP); Masahiko Hayakawa (Kanagawa, JP); Jun Koyama (Kanagawa, JP); Mitsuaki Osame (Kanagawa, JP); Aya Anzai (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/3262H01L27/1222H01L27/3276H01L29/78675H01L29/78696H01L51/52H01L27/12H01L27/124
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Quick Facts
Patent No.
US 9,905,624
App. No.
15/433,007
Granted
Feb 27, 2018
Kind
B2
Abstract

The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds times longer than that of the existing one, and thereby allowing turning to an on-state at a gate voltage particularly higher than the existing one and driving, and allowing having a low channel conductance gd. According to the present invention, not only the simple dispersion of on-current but also the normalized dispersion thereof can be reduced, and other than the reduction of the dispersion between the individual TFTs, the dispersion of the OLEDs themselves and the dispersion due to the deterioration of the OLED can be reduced.

Claims (46)

1. A light emitting device comprising:

a semiconductor layer comprising a channel formation region, a source region, and a drain region;

a first insulating film over the semiconductor layer;

a gate electrode over the first insulating film;

a gate wiring over the first insulating film;

a second insulating film over the gate electrode;

a first source wiring over the second insulating film;

a second source wiring over the second insulating film; and

a power supply line over the second insulating film,

wherein the second source wiring overlaps with the semiconductor layer,

wherein the power supply line is electrically connected to one of the source region and the drain region,

wherein the power supply line overlaps with the channel formation region,

wherein the channel formation region comprises a serpentine shape,

wherein the serpentine shape comprises a first region which extends in a direction along the gate wiring and a second region which extends in a direction along the first source wiring,

wherein the first region is longer than the second region, and

wherein a ratio of a channel width W of the channel formation region to a channel length L thereof is from 0.1 to 0.01.

2. A light emitting device comprising:

a semiconductor layer comprising a channel formation region, a source region, and a drain region;

a first insulating film over the semiconductor layer;

a gate electrode over the first insulating film;

a gate wiring over the first insulating film;

a second insulating film over the gate electrode;

a first source wiring over the second insulating film;

a second source wiring over the second insulating film; and

a power supply line over the second insulating film,

wherein the second source wiring overlaps with the semiconductor layer,

wherein the power supply line is electrically connected to one of the source region and the drain region,

wherein the power supply line overlaps with the channel formation region,

wherein the channel formation region comprises a serpentine shape,

wherein the serpentine shape comprises a first region which extends in a direction along the gate wiring and a second region which extends in a direction along the first source wiring,

wherein the second region is longer than the first region, and

wherein a ratio of a channel width W of the channel formation region to a channel length L thereof is from 0.1 to 0.01.

3. A light emitting device comprising:

a semiconductor layer comprising a channel formation region, a source region, and a drain region;

a first insulating film over the semiconductor layer;

a gate electrode over the first insulating film;

a gate wiring over the first insulating film;

a second insulating film over the gate electrode;

a source wiring over the second insulating film; and

a power supply line over the second insulating film,

wherein the source wiring overlaps with the semiconductor layer,

wherein the power supply line is electrically connected to one of the source region and the drain region,

wherein the power supply line overlaps with the channel formation region,

wherein the power supply line includes a region that a width of the power supply line is larger than a width of the source wiring,

wherein the channel formation region comprises a serpentine shape, and

wherein a ratio of a channel width W of the channel formation region to a channel length L thereof is from 0.1 to 0.01.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2017
From: UDAGAWA, MAKOTO; HAYAKAWA, MASAHIKO; KOYAMA, JUN; OSAME, MITSUAKI; ANZAI, AYA
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 041949/0737 →
Priority Claims (2)
JP 2001-344671 · Nov 9, 2001 · national
JP 2002-010766 · Jan 18, 2002 · national
Continuity (7)
Division 14730334 · Jun 4, 2015
Continuation 14172943 · Feb 5, 2014
Continuation 13689888 · Nov 30, 2012
Continuation 13432009 · Mar 28, 2012
Division 12758862 · Apr 13, 2010
Division 10286868 · Nov 4, 2002
Related Publication 20170162642A1 · Jun 8, 2017