IP Library Granted Patent US 9,893,279
Granted Patent B2
US 9,893,279 · App. 15/438,499 · Granted Feb 13, 2018

Methods, apparatuses, and circuits for programming a memory device

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Quick Facts
Patent No.
US 9,893,279
App. No.
15/438,499
Granted
Feb 13, 2018
Kind
B2
Abstract

Subject matter described pertains to methods, apparatuses, and circuits for programming a memory device.

Claims (32)

1. A device, comprising:

an arrangement of materials stacked above a device heater, the arrangement including a separation material, wherein an edge of the separation material laterally extends farther than an edge of a conductor in a first direction, the edge of the separation material laterally extending at least to a location directly above the device heater,

wherein the conductor over the arrangement is offset from directly above the device heater; and

wherein a conductive path from the conductor to the device heater is via the separation material of the arrangement.

2. The device of claim 1 , wherein the device heater is at least partially surrounded by a dielectric.

3. The device of claim 1 , wherein the separation material exhibits a resistance of between about 5 and about 50 percent of the resistance of the device heater.

4. The device of claim 1 , wherein the edge of the conductor is offset a lateral distance from a location directly above the device heater by an amount approximately equal to a multiple of a half-pitch of an applicable lithographic process.

5. The device of claim 1 , wherein the device can change a memory material from a first phase to a second phase.

6. The device of claim 1 , wherein the first phase comprises a crystalline phase, and wherein the second phase comprises an amorphous phase.

7. The device of claim 5 , wherein the first phase comprises an amorphous phase, and wherein the second phase comprises a crystalline phase.

8. The device of claim 1 , wherein the separation material is capable of reducing diffusion between the conductor and an active material included in the arrangement.

9. The device of claim 1 , wherein the device heater is capable of changing a memory material to a rupture phase.

10. A circuit, comprising:

a separation material below a conductor and above a device heater, wherein an edge of the separation material laterally extends farther than an edge of the conductor in a first direction, the edge of the separation material laterally extending at least to a location directly above the device heater, and

a conductive path from the conductor to the device heater,

wherein the conductor and a part of the conductive path are laterally offset from directly above the device heater.

11. The circuit of claim 10 , wherein the device heater is configured to change a phase of a phase material of a memory device.

12. The circuit of claim 11 , wherein the device heater is configured to change the phase of the phase material from a first phase having a first resistance to a second phase having a second resistance that is lower than the first resistance.

13. The circuit of claim 11 , wherein the device heater is configured to change a state of the phase material, while the phase material is in a first phase, from a first state to a second state that is less amorphous than the first state.

14. The circuit of claim 13 , wherein the device heater is configured to change the state of the phase material, while the phase material is in a second phase, from a first state to a second state that is more crystalline than the first state.

15. The circuit of claim 13 , wherein the device heater is configured to change the state of the phase material to the second state after the phase material has been changed to a second phase.

16. The circuit of claim 11 , further comprising:

a conductive plug beneath the device heater, wherein the conductive path comprises a path to the conductive plug.

17. A device, comprising:

an arrangement of materials above a device heater, the arrangement including a first material, wherein an edge of the first material laterally extends farther than an edge of a conductor in a first direction, the edge of the first material laterally extending at least to a location directly above the device heater; and

wherein the conductor is in contact with at least some of the arrangement of materials,

wherein a conductive path from the conductor to the device heater is via the arrangement of materials, and

wherein the device heater and a part of the conductive path are laterally offset from directly below the conductor.

18. The device of claim 17 , wherein the device heater is at least partially disposed within a dielectric material.

19. The device of claim 17 , wherein the device heater is above a switch.

20. The device of claim 17 , wherein the first material comprises:

a separation material, a memory material, or a combination thereof.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050700/0535 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046597/0393 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 5 TO PATENT SECURITY AGREEMENT Recorded Aug 8, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 043482/0776 →
SUPPLEMENT NO. 5 TO PATENT SECURITY AGREEMENT Recorded Aug 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION
Reel/Frame 043483/0686 →