Selector device having asymmetric conductance for memory applications
View Patent ↗The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element, which has a low resistance state and a high resistance state, and a two-terminal selector coupled to the MTJ memory element in series. The MTJ memory element includes a magnetic free layer and a magnetic reference layer with an insulating tunnel junction layer interposed therebetween. The two-terminal selector has an insulative state and a conductive state. The two-terminal selector in the conductive state has substantially lower resistance when switching the MTJ memory element from the low to high resistance state than from the high to low resistance state. The voltages applied to the memory cell to respectively switch the MTJ memory element from the low to high resistance state and from the high to low resistance state may be substantially same.
1. A memory cell comprising:
a magnetic tunnel junction (MTJ) memory element including a magnetic free layer and a magnetic reference layer with an insulating tunnel junction layer interposed therebetween, said MTJ memory element having a low resistance state and a high resistance state that are switched in a bipolar manner; and
a two-terminal selector conducting in two directions, said two-terminal selector having a first insulative state and a first conductive state in a first direction and a second insulative state and a second conductive state in a second direction opposite to said first direction, said first conductive state having substantially lower resistance than said second conductive state,
wherein said two-terminal selector and said MTJ memory element are coupled in series in such a way that a switching current flowing in said second direction switches said MTJ memory element from said high resistance state to said low resistance state.
2. The memory cell of claim 1 , wherein cell voltages required to respectively switch said MTJ memory element from said low to high resistance state and from said high to low resistance state are substantially same.
3. The memory cell of claim 1 , wherein said magnetic free layer has a variable magnetization direction substantially perpendicular to a layer plane thereof, said magnetic reference layer has a first invariable magnetization direction substantially perpendicular to a layer plane thereof.
4. The memory cell of claim 3 , wherein said MTJ memory element further includes a magnetic fixed layer exchanged coupled to said magnetic reference layer through an anti-ferromagnetic coupling layer, said magnetic fixed layer having a second invariable magnetization direction that is substantially perpendicular to a layer plane thereof and is opposite to said first invariable magnetization direction.
5. The memory cell of claim 4 , wherein a switching voltage of said MTJ memory element from said low resistance state to said high resistance state is substantially same as a switching voltage of said MTJ memory element from said high resistance state to said low resistance state.
6. The memory cell of claim 4 , wherein stray magnetic fields exerted on said magnetic free layer by said magnetic reference layer and said magnetic fixed layer, respectively, substantially cancel each other.
7. The memory cell of claim 3 , wherein said MTJ memory element further includes a magnetic compensation layer separated from said magnetic free layer by a non-magnetic spacer layer, said magnetic compensation layer having a second invariable magnetization direction that is substantially perpendicular to a layer plane thereof and is opposite to said first invariable magnetization direction.
8. The memory cell of claim 7 , wherein a switching voltage of said MTJ memory element from said low resistance state to said high resistance state is substantially same as a switching voltage of said MTJ memory element from said high resistance state to said low resistance state.
9. The memory cell of claim 7 , wherein stray magnetic fields exerted on said magnetic free layer by said magnetic reference layer and said magnetic compensation layer, respectively, substantially cancel each other.
10. The memory cell of claim 1 , wherein said two-terminal selector includes a first electrode and a second electrode with a switching layer interposed therebetween, said switching layer being insulative in absence of an applied voltage to said first or second electrode.
11. The memory cell of claim 10 , wherein said first and second electrodes are made of different materials.
12. A memory cell comprising:
a magnetic tunnel junction (MTJ) memory element that switches in a bipolar manner including:
a magnetic free layer having a variable magnetization direction substantially perpendicular to a layer plane thereof;
a magnetic reference layer having a first invariable magnetization direction substantially perpendicular to a layer plane thereof;
an insulating tunnel junction layer interposed between said magnetic free layer and said magnetic reference layer;
an anti-ferromagnetic coupling layer formed adjacent to said magnetic reference layer opposite said insulating tunnel junction layer; and
a magnetic fixed layer formed adjacent to said anti-ferromagnetic coupling layer opposite said magnetic reference layer, said magnetic fixed layer having a second invariable magnetization direction that is substantially perpendicular to a layer plane thereof and is opposite to said first invariable magnetization direction; and
a selector structure conducting in two directions and including a first electrode and a second electrode with a switching layer interposed therebetween, said selector structure having a first insulative state and a first conductive state in a first direction and a second insulative state and a second conductive state in a second direction opposite to said first direction, said first conductive state having substantially lower resistance than said second conductive state,
wherein said selector structure and said MTJ memory element are coupled in series in such a way that a parallelizing switching current flows in said second direction.
13. The memory cell of claim 12 , wherein said second electrode is formed adjacent to said magnetic fixed layer.
14. The memory cell of claim 13 , wherein an interface layer is formed between said second electrode and said magnetic fixed layer.
15. The memory cell of claim 12 , wherein said first electrode is formed adjacent to said magnetic free layer.
16. The memory cell of claim 15 , wherein an interface layer is formed between said first electrode and said magnetic free layer.
17. The memory cell of claim 12 , said magnetic free layer includes two or more magnetic sublayers.
18. The memory cell of claim 12 , wherein stray magnetic fields exerted on said magnetic free layer by said magnetic reference layer and said magnetic fixed layer, respectively, substantially cancel each other.
19. The memory cell of claim 12 , wherein a cell voltage required to switch said MTJ memory element from a low resistance state to a high resistance state is substantially same as a cell voltage required to switch said MTJ memory element from said high resistance state to said low resistance state.
20. The memory cell of claim 12 , wherein said first and second electrodes are made of different materials.
21. A memory cell comprising:
a magnetic tunnel junction (MTJ) memory element including:
a magnetic free layer having a variable magnetization direction substantially perpendicular to a layer plane thereof;
a magnetic reference layer having a first invariable magnetization direction substantially perpendicular to a layer plane thereof;
an insulating tunnel junction layer interposed between said magnetic free layer and said magnetic reference layer;
an anti-ferromagnetic coupling layer formed adjacent to said magnetic reference layer opposite said insulating tunnel junction layer; and
a magnetic fixed layer formed adjacent to said anti-ferromagnetic coupling layer opposite said magnetic reference layer, said magnetic fixed layer having a second invariable magnetization direction that is substantially perpendicular to a layer plane thereof and is opposite to said first invariable magnetization direction; and
a selector structure coupled to said MTJ memory element in series, said selector structure including a first electrode and a second electrode with a switching layer interposed therebetween,
wherein said selector structure has substantially lower resistance when switching a relative orientation between said variable magnetization direction and said first invariable magnetization direction from parallel to anti-parallel than from anti-parallel to parallel,
wherein said switching layer is insulative in absence of an applied voltage to said first or second electrode, said switching layer including a plurality of conductive clusters imbedded in a nominally insulative matrix, a concentration of said plurality of conductive clusters in said nominally insulative matrix decreases along a direction of an anti-parallelizing current.