IP Library Granted Patent US 10,205,456
Granted Patent B2
US 10,205,456 · App. 15/441,603 · Granted Feb 12, 2019

Systems and methods for frequency domain calibration and characterization

Inventors: Cho-Ying Lu (Hillsboro, OR); William Yee Li (Portland, OR); Khoa Minh Nguyen (Hillsboro, OR); Ashoke Ravi (Hillsboro, OR); Maneesha Yellepeddi (San Jose, CA); Binta M. Patel (Austin, TX)
Assignee: Intel Corporation
H03L7/085H03L1/00H03L7/08H03L7/091H03L7/0991H03L7/0992H03L2207/50
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Quick Facts
Patent No.
US 10,205,456
App. No.
15/441,603
Granted
Feb 12, 2019
Kind
B2
Abstract

A system for assigning a characterization and calibrating a parameter is disclosed. The system includes a frequency measurement circuit and a finite state machine. The frequency measurement circuit is configured to measure frequencies of an oscillatory signal and to generate a measurement signal including measured frequencies. The finite state machine is configured to control measurements by the frequency measurement circuit, to assign a characterization to a parameter based on the measurement signal, and to generate a calibration signal based on the characterized parameter.

Claims (13)

1. A clock circuit calibration system, comprising:

a clock circuit configured to generate an output clock signal;

a frequency measurement circuit configured to measure a frequency of the output clock signal generated by the clock circuit; and

a clock calibration circuit configured to adjust the clock circuit based on the measured frequency from the frequency measurement circuit,

wherein the frequency measurement circuit comprises a first counter configured to count a number of pulses of a reference signal during one period of the output clock signal, and

wherein the frequency measurement circuit further comprises a second counter configured to alter a count thereof based on a period of the output clock signal, wherein an output of the first and second counters is employed by the frequency measurement circuit to calculate the frequency of the output clock signal.

2. A clock circuit calibration system, comprising:

a clock circuit configured to generate an output clock signal;

a frequency measurement circuit configured to measure a frequency of the output clock signal generated by the clock circuit; and

a clock calibration circuit configured to adjust the clock circuit based on the measured frequency from the frequency measurement circuit,

wherein the clock calibration circuit comprises a finite state machine configured to output a requested correction signal based on the measured frequency from the frequency measurement circuit.

3. The clock circuit calibration system of claim 1 , further comprising a correction circuit configured to receive the requested correction signal and adjust the output clock signal based thereon.

4. The clock circuit calibration system of claim 2 , further comprising a gain component configured to adjust a gain associated with the clock circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 052916/0308 →
Continuity (4)
Continuation 15354066 · Nov 17, 2016
Continuation 14857145 · Sep 17, 2015
Continuation 14143116 · Dec 30, 2013
Related Publication 20170170833A1 · Jun 15, 2017