IP Library Granted Patent US 10,043,704
Granted Patent B2
US 10,043,704 · App. 15/442,085 · Granted Aug 7, 2018

MEMS grid for manipulating structural parameters of MEMS devices

Inventors: Roman Gutierrez (Arcadia, CA); Tony Tang (Arcadia, CA); Xiaolei Liu (South Pasadena, CA); Guiqin Wang (Arcadia, CA); Matthew Ng (Rosemead, CA)
Assignee: MEMS Drive, Inc.
H01L21/76816H01L21/76898H01L23/485H01L21/768H01L2924/00H01L2924/0002H01L2924/00014H01L2924/1461H01L2924/181
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Quick Facts
Patent No.
US 10,043,704
App. No.
15/442,085
Granted
Aug 7, 2018
Kind
B2
Abstract

A system and method for manipulating the structural characteristics of a MEMS device include etching a plurality of holes into the surface of a MEMS device, wherein the plurality of holes comprise one or more geometric shapes determined to provide specific structural characteristics desired in the MEMS device.

Claims (29)

1. A method of creating multiple routing layers in a MEMS device, comprising:

determining a trench layout, wherein the trench layout includes one or more geometric patterns defining a plurality of hole placement areas;

identifying a location for one or more anchor trenches, wherein an anchor trench is a secondary trench disposed within a defined hole placement area of a portion of the trench layout, wherein identifying the location comprises determining a position within the defined hole placement area where a portion of substrate material between the anchor trench and the trench layout is small enough to oxidize;

etching the trench layout into a substrate wafer to create a plurality of trenches;

etching the one or more anchor trenches into the substrate wafer, wherein etching the trench layout and etching the one or more anchor trenches are performed simultaneously;

growing a base layer on a surface of the substrate wafer, wherein the surface of the substrate wafer comprises a top surface of the substrate wafer and an interior face and a bottom face of the plurality of trenches and the one or more anchor trenches;

depositing a first layer of conductive material within the plurality of trenches and the one or more anchor trenches;

depositing an insulating layer on a portion of the plurality of trenches corresponding to the portion of the trench layout defining the hole placement area; and

depositing a second layer of conductive material on top of the insulating layer such that the second layer of conductive material covers the insulating layer and the one or more anchor trenches.

2. The method of claim 1 , further comprising etching into the substrate wafer through the plurality of hole placement areas to remove substrate material encompassed by the plurality of hole placement areas, resulting in a plurality of holes in a MEMS device.

3. The method of claim 1 , wherein the plurality of hole placement areas comprise one or more geometric shapes.

4. The method of claim 3 , wherein the one or more anchor trenches define an interior hole placement area, wherein an interior hole placement area comprises the same geometric shape as the hole placement area in which the corresponding anchor trench is disposed.

5. The method of claim 1 , further comprising a bridge connection between one of the plurality of trenches and the second conductive layer.

6. The method of claim 1 , wherein the insulting layer is deposited such that the substrate material between the anchor trench and the portion of the plurality of trenches is covered by the insulating layer.

7. A method of creating multiple routing layers in a MEMS device, comprising:

determining a trench layout, wherein the trench layout includes one or more geometric patterns defining a plurality of hole placement areas;

identifying a location for one or more anchor trenches, wherein an anchor trench is a secondary trench disposed within a defined hole placement area of a portion of the trench layout, wherein identifying the location comprises determining a position within the defined hole placement area where a portion of substrate material between the anchor trench and the trench layout is small enough to oxidize;

etching the trench layout into a substrate wafer to create a plurality of trenches;

masking the one or more anchor trenches for etching the one or more anchor trenches into the substrate wafer;

etching the one or more anchor trenches into the substrate wafer;

growing a base layer on a surface of the substrate wafer, wherein the surface of the substrate wafer comprises a top surface of the substrate wafer and an interior face and a bottom face of the plurality of trenches and the one or more anchor trenches;

depositing a first layer of conductive material within the plurality of trenches and the one or more anchor trenches;

depositing an insulating layer on a portion of the plurality of trenches corresponding to the portion of the trench layout defining the hole placement area; and

depositing a second layer of conductive material on top of the insulating layer such that the second layer of conductive material covers the insulating layer and the one or more anchor trenches.

8. The method of claim 7 , further comprising etching into the substrate wafer through the plurality of hole placement areas to remove substrate material encompassed by the plurality of hole placement areas, resulting in a plurality of holes in a MEMS device.

9. The method of claim 7 , wherein the plurality of hole placement areas comprise one or more geometric shapes.

10. The method of claim 9 , wherein the one or more anchor trenches define an interior hole placement area, wherein an interior hole placement area comprises the same geometric shape as the hole placement area in which the corresponding anchor trench is disposed.

11. The method of claim 7 , further comprising a bridge connection between one of the plurality of trenches and the second conductive layer.

12. The method of claim 7 , wherein the insulting layer is deposited such that the substrate material between the anchor trench and the portion of the plurality of trenches is covered by the insulating layer.

Assignments (2)
INTELLECTUAL PROPERTY AGREEMENT Recorded Mar 24, 2021
From: MEMS DRIVE INC.
To: MEMS DRIVE (NANJING) CO., LTD
Reel/Frame 055709/0399 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2017
From: GUTIERREZ, ROMAN; TANG, TONY; LIU, XIAOLEI; WANG, GUIQIN; NG, MATTHEW
To: MEMS DRIVE, INC.
Reel/Frame 041373/0548 →
Continuity (2)
Division 14872123 · Sep 30, 2015
Related Publication 20170170059A1 · Jun 15, 2017