Display device
A display panel for displaying an image is provided with a plurality of pixels arranged in a matrix. Each pixel includes one or more units each including a plurality of subunits. Each subunit includes a transistor in which an oxide semiconductor layer which is provided so as to overlap a gate electrode with a gate insulating layer interposed therebetween, a pixel electrode which drives liquid crystal connected to a source or a drain of the transistor, a counter electrode which is provided so as to face the pixel electrode, and a liquid crystal layer provided between the pixel electrode and the counter electrode. In the display panel, a transistor whose off current is lower than 10 zA/μm at room temperature per micrometer of the channel width and off current of the transistor at 85° C. can be lower than 100 zA/μm per micrometer in the channel width.
1. A semiconductor device comprising:
a liquid crystal display panel comprising a first transistor connected to a pixel electrode;
a driver circuit electrically connected to the first transistor, the driver circuit comprising a second transistor; and
an image processing circuit,
wherein the image processing circuit is operable to output a control signal including an information on whether an image signal is for a moving image or a still image,
wherein the driver circuit is operable to receive the control signal and to control a signal provided to the first transistor to place a potential of the pixel electrode in a floating state when the image signal is for a still image,
wherein the first transistor comprises a first oxide semiconductor layer, and
wherein an off current per micrometer of a channel width of the first transistor is lower than 10 zA/μm at room temperature in a range of a voltage for driving liquid crystal molecules of the liquid crystal display panel.
2. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer comprises a crystalline region.
3. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer comprises a c-axis aligned crystalline region.
4. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer comprises a depressed portion.
5. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer comprises indium, gallium, and zinc.
6. The semiconductor device according to claim 1 , wherein the second transistor comprises a second oxide semiconductor layer comprising indium, gallium, and zinc.
7. The semiconductor device according to claim 1 , wherein the first transistor has an off current per micrometer of a channel width is lower than 100 zA/μm at 85° C.
8. The semiconductor device according to claim 1 , wherein an alignment mode of liquid crystal molecules in the liquid crystal display panel is any one of a twisted nematic (TN), a vertical alignment (VA) mode, a multi-domain vertical alignment (MVA) mode, an in-plane switching (IPS) mode, a continuous pinwheel alignment (CPA) mode, and a patterned vertical alignment (PVA) mode.
9. The semiconductor device according to claim 1 , wherein the liquid crystal display panel further comprises a lighting unit comprising a light-emitting diode.
10. A semiconductor device comprising:
a liquid crystal display panel comprising a first transistor connected to a pixel electrode;
a driver circuit electrically connected to the first transistor, the driver circuit comprising a second transistor; and
an image processing circuit,
wherein the image processing circuit is operable to output a control signal including an information on whether an image signal is for a moving image or a still image,
wherein the driver circuit is operable to receive the control signal and to control a signal provided to the first transistor to place a potential of the pixel electrode in a floating state when the image signal is for a still image,
wherein the first transistor comprises a first oxide semiconductor layer and a second oxide semiconductor layer over the first oxide semiconductor layer, and
wherein an off current per micrometer of a channel width of each of the first transistor and the second transistor is lower than 10 zA/μm at room temperature in a range of a voltage for driving liquid crystal molecules of the liquid crystal display panel.
11. The semiconductor device according to claim 10 , wherein the second oxide semiconductor layer comprises a crystalline region.
12. The semiconductor device according to claim 10 , wherein the second oxide semiconductor layer comprises a c-axis aligned crystalline region.
13. The semiconductor device according to claim 10 , wherein the second oxide semiconductor layer comprises a depressed portion.
14. The semiconductor device according to claim 10 , wherein the second oxide semiconductor layer comprises indium, gallium, and zinc.
15. The semiconductor device according to claim 10 , wherein the second transistor comprises a third oxide semiconductor layer comprising indium, gallium, and zinc.
16. The semiconductor device according to claim 10 , wherein the first transistor has an off current per micrometer of a channel width is lower than 100 zA/μm at 85° C.
17. The semiconductor device according to claim 10 , wherein an alignment mode of liquid crystal molecules in the liquid crystal display panel is any one of a twisted nematic (TN), a vertical alignment (VA) mode, a multi-domain vertical alignment (MVA) mode, an in-plane switching (IPS) mode, a continuous pinwheel alignment (CPA) mode, and a patterned vertical alignment (PVA) mode.
18. The semiconductor device according to claim 10 , wherein the liquid crystal display panel further comprises a lighting unit comprising a light-emitting diode.
19. A semiconductor device comprising:
a first transistor connected to a pixel electrode;
a driver circuit electrically connected to the first transistor, the driver circuit comprising a second transistor; and
an image processing circuit,
wherein the image processing circuit is operable to output a control signal including an information on whether an image signal is for a moving image or a still image,
wherein the driver circuit is operable to receive the control signal and to control a signal provided to the first transistor to place a potential of the pixel electrode in a floating state when the image signal is for a still image,
wherein the first transistor comprises a first oxide semiconductor layer, and
wherein an off current per micrometer of a channel width of the first transistor is lower than 10 zA/μm at room temperature.