Microcontroller programmable system on a chip
Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.
1. A microcontroller comprising:
a plurality of programmable analog circuit blocks;
a plurality of programmable digital circuit blocks;
a programmable interconnect coupling the analog circuit blocks and the digital circuit blocks; and
a bus coupling analog input/output data and digital input/output data for the analog circuit blocks and the digital circuit block.
2. A microcontroller according to claim 1 wherein one of the digital circuit blocks is configured to implement logical operations.
3. A microcontroller according to claim 1 wherein one of the digital circuit blocks is configured to implement computational operations.
4. A microcontroller according to claim 1 wherein the programmable interconnect structure and the programmable analog circuit blocks and the plurality of programmable digital circuit blocks are constructed on a semiconductor chip.
5. A microcontroller according to claim 1 wherein the programmable analog circuit blocks comprise at least one continuous time analog circuit block.
6. A microcontroller according to claim 1 wherein the programmable analog circuit blocks comprise at least one switched capacitor analog circuit block.
7. A microcontroller according to claim 1 wherein the programmable digital circuit blocks comprise at least one digital multi-function circuit block having a first set of digital functions and at least one digital multi-function circuit block having a second set of digital functions different from the first set.
8. A method of providing a dynamically programmable analog/digital communication interface circuit, comprising:
configuring a plurality of programmable analog circuit blocks to implement at least one of a plurality of analog functions,
configuring a plurality of programmable digital circuit blocks to implement at least one of a plurality of digital functions; and
configuring a routing matrix to couple analog data and digital data between the programmable analog circuit blocks and the programmable digital circuit blocks.
9. The method according to claim 8 wherein flash memory is used to program the routing matrix and the plurality of programmable analog circuit blocks and the plurality of programmable digital circuit blocks and to enable dynamic circuit reconfiguration.
10. The method according to claim 8 wherein the programmable analog circuit blocks comprise at least one continuous time analog circuit and at least one switched capacitor analog circuit.
11. The method according to claim 8 wherein the programmable digital circuit blocks comprise at least one standard digital multi-function circuit having a first set of digital functions and at least one enhanced digital multi-function circuit having at least one function differing from the first set of digital functions.
12. The method according to claim 8 wherein the programmable analog circuit blocks comprise at least one multi-function circuit programmable for at least one of the plurality of analog functions and at least one fixed function circuit programmable for a fixed function with at least one of a number of different parameters.
13. The method according to claim 8 wherein the plurality of digital functions comprises logical operations.
14. The method according to claim 8 wherein the plurality of digital functions comprises computational operations.