IP Library Granted Patent US 10,338,995
Granted Patent B2
US 10,338,995 · App. 15/456,034 · Granted Jul 2, 2019

End to end FPGA diagnostics for a safety system

Inventors: Gary Perkins (Clay Springs, AZ); Malcolm J. Rush (Phoenix, AZ); Martin Peter John Cornes (Phoenix, AZ); Andrew Porter (Phoenix, AZ); Rajesh Mangal (Gilbert, AZ)
Assignee: Artesyn Embedded Computing, Inc.
G06F11/0796G06F11/0739G06F11/1641G06F11/2033G06F11/3055G06F11/2097
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Quick Facts
Patent No.
US 10,338,995
App. No.
15/456,034
Granted
Jul 2, 2019
Kind
B2
Abstract

A system includes a first fail-safe chassis (FSC) receives module health signals from a plurality of modules and generates a first chassis health signal. The chassis health signal includes first and second portions. A plurality of modules receives the chassis health signal. The FSC determines whether one or more of the module heals signals indicates an associated module is unhealthy by comparing the module health signals and a predetermined health value. The FSC selectively de-asserts the first chassis health signal based on the comparison. A second FSC operates similarly. A safety relay box determines the health of the system in accordance with the first and second chassis health signals.

Claims (40)

1. A system comprising:

a first fail-safe chassis (FSC) that:

receives a plurality of module health signals from a plurality of associated modules and continuously generates a chassis health signal including a first portion indicating the health of the chassis and a second portion indicating a test request a plurality of modules in the system that each receive the chassis health signal;

determines whether one or more of the module health signals indicates that an associated module is unhealthy based on a first comparison between each of the module health signals and a predetermined health value; and

selectively de-asserts first chassis health signal based on the first comparison;

a second FSC that:

receives a plurality of module health signals from a plurality of associated modules and continuously generates a second chassis health signal that contains a first portion indicating the health of the chassis and a second portion indicating a test request, a plurality of modules in the system each receive the chassis health signal;

determines whether one or more of the module health signals indicates that an associated module is unhealthy based on a second comparison between the module health signals and the predetermined health value;

selectively de-asserts first chassis health signal based on the second comparison; and

a safety relay box module that determines whether to instruct the first FSC to operate in a predetermined mode based on the chassis health signal and the second chassis health signal.

2. The system of claim 1 wherein one of the plurality of modules begins a test based on a third comparison of the second portion of the chassis health signal and a predetermined test request value determined in accordance with the one of the plurality of modules.

3. The system of claim 2 wherein the module health signal associated with a selected one of the plurality of modules instructed to run the test will de-assert its module health as a result of that test.

4. The system of claim 3 wherein the chassis health signal is de-asserted in accordance with result of that test.

5. The system of claim 4 wherein if the module health signal is not de-asserted and the chassis health signal is not de-asserted, the FSC will de-assert the chassis health signal.

6. The system of claim 1 wherein the first FSC includes a master CPU that receives a first copy of a data packet and a checker CPU that receives a second copy of the data packet.

7. The system of claim 6 wherein the master CPU communicates the first copy of the data packet to the checker CPU and wherein the checker CPU communicates the second copy of the data packet to the master CPU.

8. The system of claim 7 wherein a master CPU selectively de-asserts a first module health signal based on a first comparison between the first copy of the data packet and the second copy of the data packet and wherein the checker CPU selectively de-asserts a second module health signal based on a second comparison between the second copy of the data packet and the first copy of the data packet.

9. The system of claim 8 wherein the master CPU de-asserts the first module health signal when the master CPU determines the first copy of the data packet is not identical to the second copy of the data packet.

10. The system of claim 8 wherein the checker CPU de-asserts the second module health signal when the checker CPU determines the second copy of the data packet is not identical to the first copy of the data packet.

11. The system of claim 3 wherein the chassis health signal includes a first portion that indicates a current health of the FSC and a second portion that indicates whether to perform a test of a predetermined module.

12. The system of claim 1 wherein the FSC de-asserts the chassis health signal when a first module health signal is not equal to the predetermined health value.

13. The system of claim 1 wherein the FSC de-asserts the chassis health signal when a second module health signal is not equal to the predetermined health value.

14. A method comprising:

receiving, by a fail-safe chassis (FSC) that generates a chassis health signal, a plurality of module health signals from a plurality of associated modules, wherein the chassis health signal includes a first portion indicating the health of the chassis and a second portion indicating a test request and wherein the FSC inserts a test request onto the chassis health signal;

determining whether one or more of the module health signals indicates that an associated module is unhealthy based on the first comparison between each of the module health signals and a predetermined health value;

de-asserting the chassis health signal based on the first comparison; and

determining, by a safety relay box, whether to instruct the FSC to operate in a predetermined mode based on the chassis health signal and another chassis health signal.

15. The method of claim 14 further comprising receiving, at a master CPU associated with the FSC, a first copy of a data packet and receiving, at a checker CPU associated with the FSC, a second copy of the data packet.

16. The method of claim 15 further comprising communicating the first copy of the data packet to the checker CPU and the second copy of the data packet to the master CPU.

17. The method of claim 16 further comprising selectively de-asserting a first module health signal based on a first comparison between the first copy of the data packet and the second copy of the data packet and selectively de-asserting a second module health signal based on a second comparison between the second copy of the data packet and the first copy of the data packet.

18. The method of claim 17 further comprising de-asserting the first module health signal when the first copy of the data packet is not identical to the second copy of the data packet.

19. The method of claim 17 further comprising de-asserting the second module health signal when the second copy of the data packet is not identical to the first copy of the data packet.

20. The method of claim 16 further comprising indicating, by a first module health signal, a current health of the master CPU, and indicating, by a second module health signal, a current health of the checker CPU.

21. The method of claim 20 further comprising de-asserting the chassis health signal when the first module health signal is not equal to the predetermined health value.

22. The method of claim 21 further comprising de-asserting the chassis health signal when the second module health signal is not equal to the predetermined health value.

23. The method of claim 22 where each of the plurality of modules within the FSC compares the second portion of the chassis health signal to a test request pattern determined in accordance with a respective one of the plurality of modules module.

24. The method of claim 21 , wherein, the module runs a test resulting in a de-assertion of its module health signal based on the first comparison.

25. The method of claim 22 where the FSC de-asserts its chassis health signal if the de-assertion of module health does not occur.

26. The method of claim 22 where the FSC de-asserts its chassis health signal if the de-assertion of module health does not occur.

27. The method of claim 22 wherein the de-assertion is brief.

Assignments (9)
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
RELEASE OF PATENT SECURITY INTEREST RECORDED AT R/F 058983/0001 Recorded Jun 25, 2025
From: CITIZENS BANK, N.A.
To: SMART MODULAR TECHNOLOGIES, INC.; SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; CREELED, INC.
Reel/Frame 071725/0207 →
RELEASE OF SECURITY INTEREST Recorded Feb 7, 2022
From: BANK OF AMERICA, N.A., AS AGENT
To: SMART EMBEDDED COMPUTING, INC.
Reel/Frame 058913/0097 →
RELEASE OF SECURITY INTEREST AT REEL 050471 FRAME 0912 Recorded Feb 7, 2022
From: BARCLAYS BANK PLC
To: SMART EMBEDDED COMPUTING, INC.
Reel/Frame 058961/0005 →
SECURITY INTEREST Recorded Feb 7, 2022
From: SMART MODULAR TECHNOLOGIES, INC.; SMART HIGH RELIABILITY SOLUTIONS, LLC; SMART EMBEDDED COMPUTING, INC.; CREELED, INC.
To: CITIZENS BANK, N.A.
Reel/Frame 058983/0001 →
SECURITY INTEREST Recorded Dec 23, 2020
From: SMART EMBEDDED COMPUTING INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 054739/0137 →
CHANGE OF NAME Recorded Jun 24, 2020
From: ARTESYN EMBEDDED COMPUTING, INC.
To: SMART EMBEDDED COMPUTING, INC.
Reel/Frame 053023/0953 →
SECURITY AGREEMENT Recorded Sep 24, 2019
From: SMART EMBEDDED COMPUTING, INC.
To: BARCLAYS BANK PLC
Reel/Frame 050471/0912 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2017
From: PERKINS, GARY; RUSH, MALCOLM J; CORNES, MARTIN PETER JOHN; PORTER, ANDREW; MANGAL, RAJESH
To: ARTESYN EMBEDDED COMPUTING, INC.
Reel/Frame 041840/0402 →
Continuity (1)
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