IP Library Granted Patent US 10,636,765
Granted Patent B2
US 10,636,765 · App. 15/458,649 · Granted Apr 28, 2020

System-in-package with double-sided molding

Inventors: DeokKyung Yang (Seoul, KR); YongMin Kim (Incheon-si, KR); JaeHyuk Choi (Incheon, KR); YeoChan Ko (Incheon, KR); HeeSoo Lee (Kyunggi-do, KR)
Assignee: STATS ChipPAC Pte. Ltd.
H01L25/0655H01L21/56H01L21/561H01L21/565H01L21/566H01L21/6835H01L23/3121H01L23/552H01L25/0652H01L25/16H01L25/50H01L21/486H01L22/14H01L23/3128H01L23/49816H01L23/50H01L23/5384H01L24/05H01L24/11H01L24/13H01L24/81H01L24/94H01L2221/68331H01L2221/68345H01L2221/68359H01L2221/68381H01L2224/0345H01L2224/03452H01L2224/03462H01L2224/03464H01L2224/0401H01L2224/05111H01L2224/05124H01L2224/05139H01L2224/05144H01L2224/05147H01L2224/05155H01L2224/05611H01L2224/05624H01L2224/05639H01L2224/05644H01L2224/05647H01L2224/05655H01L2224/1132H01L2224/1145H01L2224/11334H01L2224/11462H01L2224/11464H01L2224/11849H01L2224/11901H01L2224/131H01L2224/13111H01L2224/13113H01L2224/13116H01L2224/13124H01L2224/13139H01L2224/13144H01L2224/13147H01L2224/13155H01L2224/16113H01L2224/16227H01L2224/32225H01L2224/73204H01L2224/81005H01L2224/81191H01L2224/81192H01L2224/81201H01L2224/81203H01L2224/81411H01L2224/81424H01L2224/81439H01L2224/81444H01L2224/81447H01L2224/81455H01L2224/81466H01L2224/81484H01L2224/81815H01L2224/92125H01L2224/94H01L2224/97H01L2225/06517H01L2225/06537H01L2225/06572H01L2924/0105H01L2924/01013H01L2924/01022H01L2924/01028H01L2924/01029H01L2924/01047H01L2924/01074H01L2924/01079H01L2924/15311H01L2924/15312H01L2924/18161H01L2924/19041H01L2924/19042H01L2924/19043H01L2924/19105H01L2924/19106H01L2924/3025
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Quick Facts
Patent No.
US 10,636,765
App. No.
15/458,649
Granted
Apr 28, 2020
Kind
B2
Abstract

A semiconductor device includes a substrate with an opening formed through the substrate. A first electronic component is disposed over the substrate outside a footprint of the first opening. A second electronic component is disposed over the substrate opposite the first electrical component. A third electronic component is disposed over the substrate adjacent to the first electronic component. The substrate is disposed in a mold including a second opening of the mold over a first side of the substrate. The mold contacts the substrate between the first electronic component and the third electronic component. An encapsulant is deposited into the second opening. The encapsulant flows through the first opening to cover a second side of the substrate. In some embodiments, a mold film is disposed in the mold, and an interconnect structure on the substrate is embedded in the mold film.

Claims (58)

1. A method of making a semiconductor device, comprising:

providing a substrate including a first opening formed through the substrate from a first surface of the substrate to a second surface of the substrate, wherein the substrate completely surrounds the first opening;

disposing a first electronic component over the first surface of the substrate;

disposing a second electronic component over the second surface of the substrate;

providing a mold including a first plate and a second plate forming a first chamber;

disposing the substrate in the mold with the first electronic component and second electronic component disposed in the first chamber and the first plate and second plate in contact with the substrate, wherein a second opening of the mold is disposed over the first surface of the substrate;

depositing an encapsulant into the second opening, wherein the encapsulant flows from over the first surface of the substrate, through the first opening, and then over the second surface of the substrate to cover the second electronic component and second surface of the substrate; and

singulating the substrate and encapsulant between the first electronic component and second electronic component, wherein singulating completely removes the first opening.

2. The method of claim 1 , further including:

disposing a mold film in the mold; and

disposing the substrate in the mold with an interconnect structure of the substrate embedded in the mold film.

3. The method of claim 1 , further including:

disposing a third electronic component over the first surface of the substrate; and

disposing the substrate in the mold with the third electronic component disposed in a second chamber of the mold, wherein the second chamber is isolated from the first chamber.

4. The method of claim 1 , further including forming a third opening through a saw street of the substrate between the first electronic component and second electronic component, wherein the first electronic component is in a first device region of the substrate and the second electronic component is in a second device region of the substrate.

5. The method of claim 1 , further including:

disposing the substrate in the mold with the mold contacting a portion of the substrate between the first electronic component and second electronic component;

forming a masking layer over the portion of the substrate after removing the substrate from the mold;

forming a shielding layer over the encapsulant and masking layer;

removing the masking layer after forming the shielding layer; and

forming an interconnect structure on the portion of the substrate.

6. The method of claim 1 , wherein singulating the substrate and encapsulant results in a side surface of the substrate being coplanar with a side surface of the encapsulant.

7. A method of making a semiconductor device, comprising:

providing a substrate including a first opening formed through the substrate;

disposing a first electronic component over a first surface of the substrate;

disposing the substrate in a mold;

depositing an encapsulant into the mold over a second surface of the substrate opposite the first surface, wherein the encapsulant flows through the first opening to cover the first electronic component and the second surface of the substrate; and

singulating the encapsulant and substrate to separate the first opening from the first electronic component.

8. The method of claim 7 , further including providing a mold underfill between the substrate and first electronic component.

9. The method of claim 7 , further including:

disposing a mold film in the mold; and

disposing the substrate in the mold with the first electronic component contacting the mold film.

10. The method of claim 7 , further including:

disposing a second electronic component over the substrate opposite the first electronic component; and

depositing the encapsulant over the second electronic component.

11. The method of claim 10 , further including:

forming a first shielding layer over the first electronic component after depositing the encapsulant; and

forming a second shielding layer over the second electronic component after depositing the encapsulant.

12. The method of claim 7 , further including:

depositing the encapsulant over a first portion of the substrate while a second portion of the substrate remains devoid of the encapsulant; and

disposing an interconnect structure on the second portion of the substrate after depositing the encapsulant.

13. The method of claim 7 , further including mounting a leadframe onto the substrate prior to disposing the substrate in the mold.

14. The method of claim 7 , wherein the substrate continuously surrounds the first opening through the substrate.

15. A method of making a semiconductor device, comprising:

providing a substrate including a first opening formed through a saw street of the substrate;

disposing a first electronic component over a first surface of the substrate;

depositing an encapsulant through the first opening to cover the first electronic component, wherein the encapsulant flows from over a second surface of the substrate opposite the first surface of the substrate, through the first opening, and then over the first surface of the substrate; and

singulating the semiconductor device through the first opening of the substrate.

16. The method of claim 15 , further including forming an interconnect structure over the substrate prior to depositing the encapsulant, wherein the interconnect structure remains exposed after depositing the encapsulant.

17. The method of claim 15 , further including disposing a second electronic component over the substrate, wherein the first opening is between the first electronic component and second electronic component.

18. The method of claim 15 , further including:

disposing a second electronic component over the substrate; and

disposing the substrate in a mold, wherein the mold contacts the substrate between the first electronic component and second electronic component.

19. The method of claim 18 , wherein the mold contacts a conductive layer of the substrate.

20. The method of claim 15 , further including:

disposing a second electronic component over the substrate opposite the first electronic component; and

depositing the encapsulant over the first electronic component and second electronic component.

21. The method of claim 15 , wherein the first opening is completely contained within the saw street and the substrate continuously surrounds the first opening through the substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2017
From: YANG, DEOKKYUNG; KIM, YONGMIN; CHOI, JAEHYUK; KO, YEOCHAN; LEE, HEESOO
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 041573/0029 →
Continuity (1)
Related Publication 20180269181A1 · Sep 20, 2018
Cited By (6)
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