IP Library Granted Patent US 10,128,128
Granted Patent B2
US 10,128,128 · App. 15/460,557 · Granted Nov 13, 2018

Method of manufacturing semiconductor device having air gap between wirings for low dielectric constant

Inventors: Tsuyoshi Takeda (Toyama, JP); Hiroshi Ashihara (Toyama, JP); Naofumi Ohashi (Toyama, JP); Toshiyuki Kikuchi (Toyama, JP)
Assignee: HITACHI KOKUSAI ELECTRIC INC.
H01L21/4857H01L21/7685H01L21/76819H01L21/76834H01L23/5222H01L23/5329H01L23/53295H01L23/53238
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Quick Facts
Patent No.
US 10,128,128
App. No.
15/460,557
Granted
Nov 13, 2018
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes: (a) loading into a process chamber a substrate including: a wiring layer including a first interlayer insulating film, a plurality of copper-containing films formed on the first interlayer insulating film and used as a wiring, an inter-wire insulating film electrically insulating the plurality of copper containing film and a recess formed between the plurality of copper-containing film; and a first diffusion barrier film formed on a first portion of a surface of the plurality of copper-containing films to suppress a diffusion of a component of the plurality of copper-containing film; and (b) supplying a silicon-containing gas into the process chamber to form a silicon-containing film on: a surface of the recess; and a second portion of the surface of the plurality of copper-containing films other than the first portion where the first diffusion barrier film is formed.

Claims (11)

1. A method of manufacturing a semiconductor device, comprising:

(a) loading into a process chamber a substrate comprising: a wiring layer comprising a first interlayer insulating film, a plurality of copper-containing films formed on the first interlayer insulating film and used as a wiring, an inter-wire insulating film electrically insulating the plurality of copper containing film and a recess formed between the plurality of copper-containing film; and a first diffusion barrier film formed on a first portion of a surface of the plurality of copper-containing films to suppress a diffusion of a component of the plurality of copper-containing film;

(b) supplying a first silicon-containing gas containing chlorine and silicon into the process chamber to form a first silicon-containing film containing chlorine and silicon on: a surface of the recess; and a second portion of the surface of the plurality of copper-containing films other than the first portion where the first diffusion barrier film is formed;

(c) supplying a second silicon-containing gas containing hydrogen and silicon into the process chamber after performing (b) to form a second silicon-containing film, wherein the second silicon-containing gas is different from the first silicon-containing gas, chlorine is removed from the first silicon-containing film by attaching hydrogen to chlorine in the first silicon-containing film, and silicon is attached to the first silicon-containing film in place of chlorine removed by hydrogen; and

(d) supplying a modifying gas into the process chamber after performing (c) to form a second diffusion barrier film by modifying the second silicon-containing film to suppress the diffusion of the component of the plurality of copper-containing films from the second portion, wherein the substrate is maintained at a temperature whereat a diffusion of silicon contained in the second silicon-containing film into the plurality of copper-containing films is suppressed.

2. The method of claim 1 , wherein the modifying gas nitrides the second silicon-containing film in (d).

3. The method of claim 2 , wherein the second silicon-containing film is nitrided by a nitrogen-containing gas in plasma state in (d).

4. The method of claim 1 , wherein (b) and (c) are repeated.

5. The method of claim 1 , further comprising:

(e) forming a second interlayer insulating film on the wiring layer; and

(f) polishing the second interlayer insulating film.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2018
From: HITACHI KOKUSAI ELECTRIC INC.
To: KOKUSAI ELECTRIC CORPORATION
Reel/Frame 047995/0490 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2018
From: HITACHI KOKUSAI ELECTRIC INC.
To: KOKUSAI ELECTRIC CORPORATION
Reel/Frame 047995/0462 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2017
From: TAKEDA, TSUYOSHI; ASHIHARA, HIROSHI; OHASHI, NAOFUMI; KIKUCHI, TOSHIYUKI
To: HITACHI KOKUSAI ELECTRIC INC.
Reel/Frame 041596/0646 →
Priority Claims (1)
JP 2016-068140 · Mar 30, 2016 · national
Continuity (1)
Related Publication 20170287731A1 · Oct 5, 2017