Method for manufacturing semiconductor structure

1. A method for manufacturing a semiconductor structure, comprising:

providing a substrate of a first material system, the substrate having a first device region and a second device region;

defining an active region only in the first device region, the active region comprising a transistor having a channel; and

forming a layer of a second material system on the substrate, the second material system being different from the first material system; and

defining an isolation region in a portion of the layer over the first device region and at least across an entire width of the first device region by an implantation operation.

2. The method of claim 1 , further comprising:

forming an interconnect penetrating through the layer of the second material system, the interconnect connecting the active region to a conductive layer over the first device region.

3. The method of claim 1 , wherein the implantation operation comprises implanting dopants with a negative charge.

4. The method of claim 1 , wherein:

the operation of forming the layer of a second material system on the substrate comprises:

forming a first bandgap layer on the substrate; and

forming a second bandgap layer on the first bandgap layer; and

the operation of defining the isolation region in a portion of the layer over the first device region comprises:

defining the isolation region across an interface of the first bandgap layer and the second bandgap layer.

5. The method of claim 4 , wherein a bandgap of the second bandgap layer is greater than a bandgap of the first bandgap layer.

6. The method of claim 1 , wherein the first material system comprises Si, and the second material system comprises III-V material.

7. The method of claim 2 , wherein the forming the interconnect penetrating through the layer of the second material system comprises forming a through-GaN-via.

8. The method of claim 1 , wherein defining the active region is prior to defining the isolation region.

9. A method for manufacturing a semiconductor structure, comprising:

providing a silicon substrate having a first device region and a second device region;

defining a first active region only in the first device region, the active region comprising a transistor having a channel;

forming a III-V layer on the silicon substrate after the defining the first active region, comprising:

depositing a first bandgap layer over the first device region; and

depositing a second bandgap layer over the first bandgap layer;

defining an isolation region across an interface of the first bandgap layer and the second bandgap layer by an implantation operation; and

forming an interconnect penetrating through the isolation region.

10. The method of claim 9 , wherein the forming the III—V layer on the silicon substrate comprises:

depositing the first bandgap layer over the first device region and the second device region.

11. The method of claim 9 , wherein the implantation operation comprises implanting dopants with a negative charge.

12. The method of claim 10 , wherein the defining the isolation region comprises implanting dopants with a negative charge.

13. The method of claim 9 , further comprising:

forming the interconnect penetrating through the III-V layer, the interconnect connecting the first active region to a conductive layer over the first device region.

14. The method of claim 10 , whereby depositing the first bandgap layer and the second bandgap layer forms a second active region above the second device region.

15. The method of claim 9 , further comprising:

forming the interconnect penetrating through the III-V layer directly over the first device region; and

forming a conductive layer over the III-V layer,

wherein the interconnect connects the first active region to the conductive layer.

16. The method of claim 10 , wherein a bandgap of the second bandgap layer is greater than a bandgap of the first bandgap layer.

17. The method of claim 9 , wherein defining the first active region is prior to defining the isolation region.

18. A method for manufacturing a semiconductor structure, comprising:

providing a silicon substrate having a first device region and a second device region;

defining a first active region in the first device region;

forming a first bandgap layer on the silicon substrate;

forming a second bandgap layer on the first bandgap layer;

defining an isolation region across an interface between the first bandgap layer and the second bandgap layer by an ion implantation operation;

forming an interconnect penetrating through the isolation region;

patterning a conductive layer directly on a top surface of the second bandgap layer, the conductive layer disposed over the first device region and the second device region after the patterning.

19. The method of claim 18 , whereby forming the first bandgap layer and the second bandgap layer forms a second active region above the second device region.

20. The method of claim 18 , further comprising:

forming the interconnect penetrating through the first bandgap layer and the second bandgap layer, the interconnect being directly over the first device region.