IP Library Granted Patent US 9,837,153
Granted Patent B1
US 9,837,153 · App. 15/468,512 · Granted Dec 5, 2017

Selecting reversible resistance memory cells based on initial resistance switching

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Quick Facts
Patent No.
US 9,837,153
App. No.
15/468,512
Granted
Dec 5, 2017
Kind
B1
Abstract

Technology is described for selecting a group of reversible-resistance memory cells in which to store data based on information regarding switching the reversible-resistance memory cells from a first resistance state in which the reversible-resistance memory cells are in immediately after fabrication to a second resistance state for the first time after fabrication. Information regarding switching the reversible-resistance memory cells from the first resistance state to the second resistance state for the first time after fabrication may provide insight into factors including, but not limited to, endurance and data retention. In one aspect, a control circuit is configured to select a group of reversible-resistance memory cells in which to store data based on both the difficulty in switching from the first resistance state to the second resistance state for the first time after fabrication and a temperature of the data to be stored in the memory system.

Claims (50)

1. An apparatus, comprising:

a plurality of reversible-resistance memory cells;

a control circuit in communication with the plurality of reversible-resistance memory cells, the control circuit configured to:

access information regarding switching groups of the reversible-resistance memory cells from a first resistance state in which the reversible-resistance memory cells are in immediately after fabrication to a second resistance state for the first time after fabrication;

select a group of reversible-resistance memory cells to store data based on the information for respective ones of the groups; and

store data in the selected group.

2. The apparatus of claim 1 , wherein the information is based on a difficulty in switching groups of the reversible-resistance memory cells from the first resistance state to the second resistance state for the first time after fabrication.

3. The apparatus of claim 1 , wherein the information is based on a difficulty in forming groups of the reversible-resistance memory cells after fabrication.

4. The apparatus of claim 1 , wherein the information is based on a difficulty in initializing groups of the reversible-resistance memory cells after fabrication.

5. The apparatus of claim 1 , wherein the control circuit is configured to select a group of the reversible-resistance memory cells based on both a difficulty in switching groups of the reversible-resistance memory cells from the first resistance state to the second resistance state for the first time after fabrication and a temperature of the data to be stored.

6. The apparatus of claim 5 wherein, to select a group based on both the difficulty in switching groups of the reversible-resistance memory cells from the first resistance state to the second resistance state for the first time after fabrication and a temperature of the data to be stored, the control circuit is configured to:

store data having a first temperature in groups of reversible-resistance memory cells for which switching from the first resistance state to the second resistance state for the first time after fabrication has a first difficulty; and

store data having a second temperature in groups of reversible-resistance memory cells for which switching from the first resistance state to a low resistance state for the first time after fabrication has a second difficulty that is greater than the first difficulty, wherein the second temperature is less than the first temperature.

7. The apparatus of claim 5 wherein, to select a group based on both the difficulty in switching from the first resistance state to the second resistance state for the first time after fabrication and a temperature of the data to be stored, the control circuit is configured to:

store data having a first temperature in groups of reversible-resistance memory cells for which switching from the first resistance state to the second resistance state for the first time after fabrication has a first difficulty; and

store data having a second temperature in groups of reversible-resistance memory cells for which switching from the first resistance state to the second resistance state for the first time after fabrication has a second difficulty that is greater than the first difficulty, wherein the second temperature is greater than the first temperature.

8. The apparatus of claim 7 wherein, to select a group based on both the difficulty in switching from the first resistance state to the second resistance state for the first time after fabrication and a temperature of the data to be stored, the control circuit is further configured to:

store data having a third temperature in groups of reversible-resistance memory cells for which switching from the first resistance state to the second resistance state for the first time after fabrication has a third difficulty that is greater than both the first and second difficulties, wherein the third temperature is less than the first temperature and less than the second temperature.

9. The apparatus of claim 1 , further comprising storage that stores the indication of difficulty in switching from the first resistance state to the second resistance state for the first time after fabrication, wherein the stored indication is based on how many iterations of a process is used to switch reversible-resistance memory cells in a group from the first resistance state to the second resistance state for the first time after fabrication.

10. A method of operating a non-volatile memory system comprising reversible-resistance memory cells, comprising:

accessing information that characterizes groups of the reversible-resistance memory cells based on how many iterations of a forming procedure were used to form the reversible-resistance memory cells in the respective groups;

selecting a group of the reversible-resistance memory cells based on the information; and

storing data in the selected group.

11. The method of claim 10 , wherein the selecting a group of the reversible-resistance memory cells is based on both the information and a temperature of data to be stored in the memory system.

12. The method of claim 11 , wherein the selecting a group of the reversible-resistance memory cells based on the both the information and a temperature of data to be stored in the memory system comprises:

storing data having a first temperature in groups of the reversible-resistance memory cells for which forming is characterized by a first range of forming iterations; and

storing data having a second temperature in reversible-resistance memory cells for which forming is characterized by a second range of forming iterations that is greater than the first range, wherein the second temperature is less than the first temperature.

13. The method of claim 11 , wherein the selecting a group of the reversible-resistance memory cells based on the both the information and a temperature of data to be stored in the memory system comprises:

storing data having a first temperature in reversible-resistance memory cells for which forming is characterized by a first range of forming iterations; and

storing data having a second temperature in reversible-resistance memory cells for which forming is characterized by a second range of forming iterations that is less than the first range, wherein the second temperature is less than the first temperature.

14. The method of claim 13 , wherein the selecting a group of the reversible-resistance memory cells based on the both the information and a temperature of data to be stored in the memory system further comprises:

storing data having a third temperature in reversible-resistance memory cells for which forming has a third range of forming iterations that is greater than both the first and second ranges, wherein the third temperature is less than the first temperature and less than the second temperature.

15. The method of claim 10 , wherein the selecting a group of the reversible-resistance memory cells based on the information comprises:

performing logical to physical mapping of data to the reversible-resistance memory cells based on the information.

16. The method of claim 10 , wherein the selecting a group of the reversible-resistance memory cells based on the information comprises:

performing wear-leveling of the reversible-resistance memory cells based on the information.

17. A non-volatile memory system, comprising:

a plurality of reversible-resistance memory cells;

means for accessing stored information of difficulty in switching groups of the reversible-resistance memory cells from a virgin resistance state to a target resistance state the first time after fabrication of the reversible-resistance memory cells;

means for determining a temperature of data to be stored in the memory system;

means for selecting a group of the reversible-resistance memory cells based on the information and the temperature of the data; and

means for storing the data in the selected group.

18. The non-volatile memory system of claim 17 , wherein the means for selecting a group of the reversible-resistance memory cells based on the information and the temperature of the data comprises means for storing colder data into groups of the reversible-resistance memory cells for which the stored information indicates data retention or endurance is expected to be worse than average and means for storing warmer data into groups of the reversible-resistance memory cells for which the stored information indicates data retention or endurance is expected to be better than average.

19. The non-volatile memory system of claim 17 , wherein the means for selecting a group of the reversible-resistance memory cells based on the information and the temperature of the data comprises means for storing warm data in groups of the reversible-resistance memory cells for which switching from a high resistance state to a low resistance state the first time after fabrication was easiest, means for storing hot data in groups of the reversible-resistance memory cells for which switching from a high resistance state to a low resistance state the first time after fabrication was second easiest, means for storing cold data in groups of the reversible-resistance memory cells for which switching from a high resistance state to a low resistance state the first time after fabrication was second most difficult, and means for storing coldest data in groups of the reversible-resistance memory cells for which switching from a high resistance state to a low resistance state the first time after fabrication was the most difficult.

20. The non-volatile memory system of claim 17 , further comprising:

means for performing wear-leveling of the plurality of reversible-resistance memory cells based on the stored information and the temperature of the data.

21. A method of operating a non-volatile memory system comprising reversible-resistance memory cells, comprising:

accessing information that characterizes groups of the reversible-resistance memory cells based on how many iterations of an initialization procedure were used to initialize the reversible-resistance memory cells in the respective groups;

selecting a group of the reversible-resistance memory cells based on the information; and

storing data in the selected group.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2025
From: SANDISK TECHNOLOGIES, INC.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 070778/0175 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2017
From: RAJAMOHANAN, BIJESH; PETTI, CHRISTOPHER; HU, XINDE
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 041833/0626 →