IP Library › Granted Patent US 10,116,288
Granted Patent B2
US 10,116,288 · App. 15/482,384 · Granted Oct 30, 2018

Reduced overhead on digital signal processing for motor drive applications

Inventors: Sesh Mohan Rao (Bangalore, IN); Shobhit Agrawal (Bangalore, IN); Priya Kakarla Naga Lakshmi (Bangalore, IN)
Assignee: HAMILTON SUNDSTRAND CORPORATION
H03K3/033H03K5/1565H03M1/124
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,116,288
App. No.
15/482,384
Granted
Oct 30, 2018
Kind
B2
Abstract

In accordance with one or more embodiments, a monostable multivibrator that is communicatively coupled to a host device and an external analog-to-digital converter is provided. The monostable multivibrator receives a chip select signal from the host device. The monostable multivibrator also generates, in response to the chip select signal, a conversion start signal to the external analog-to-digital converter.

Claims (10)

1. A monostable multivibrator communicatively coupled to a host device and an external analog-to-digital converter, the monostable multivibrator configured to:

receive a chip select signal from the host device, the chip select signal going low to trigger the monostable multivibrator to provide the monostable pulse; and

generate, in response to the chip select signal, a conversion start signal to the external analog-to-digital converter, the conversion start signal comprising the monostable pulse provided by the monostable multivibrator to the external analog-to-digital converter; and

control a pulse width of the monostable pulse by a resistor-capacitor circuit of the monostable multivibrator.

2. The monostable multivibrator of claim 1 , wherein the monostable multivibrator utilizes when the chip select signal goes low as a trigger to generate the conversion start signal.

3. The monostable multivibrator of claim 2 , wherein the monostable multivibrator is configured to repeat in each cycle as the chip select signal goes low the conversion start signal.

4. The monostable multivibrator of claim 1 , wherein the host device is configured to enable a delay between the chip select signal and an application of a clock to allow a conversion.

5. The monostable multivibrator of claim 1 , wherein the host device is configured to utilize a serial peripheral interface enable signal to control an application of a serial clock.

6. The monostable multivibrator of claim 1 , wherein a busy signal from the external analog-to-digital converter indicates a completion of a conversion.

7. The monostable multivibrator of claim 1 , wherein the host device is a digital signal processor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2017
From: RAO, SESH MOHAN; AGRAWAL, SHOBHIT; LAKSHMI, PRIYA KAKARLA NAGA
To: HAMILTON SUNDSTRAND CORPORATION
Reel/Frame 041933/0666 →
Priority Claims (1)
IN 201711004438 · Feb 7, 2017 · national
Continuity (1)
Related Publication 20180226955A1 · Aug 9, 2018
Cited By (1)
US 12,261,528