Semiconductor device and manufacturing method thereof

1. A semiconductor device comprising:

a semiconductor die including a first surface, a second surface opposite to the first surface, a third surface formed between the first surface and the second surface, and a plurality of interconnection structures formed on the second surface;

an EMI shield layer contacting the first surface and the third surface of the semiconductor die;

a substrate electrically connected to the plurality of interconnection structures of the semiconductor die;

an encapsulating portion encapsulating the EMI shield layer and the substrate, the encapsulating portion comprising a mold material adhered to the EMI shield layer; another semiconductor die horizontally spaced apart from the semiconductor die; and wherein the EMI shield layer fills a gap between the semiconductor die and the other semiconductor die with EMI shielding material to a level that at least surpasses the second surface of the semiconductor die.

2. The semiconductor device of claim 1 , wherein the semiconductor die comprises:

a contact pad electrically connected to an interconnection structure of the plurality of interconnection structures; and

a ground circuit pattern electrically connecting the contact pad and the EMI shield layer.

3. The semiconductor device of claim 1 , where in the EMI shield layer comprises a material selected from a conductive polymer, a conductive ink, a conductive paste, and a conductive foil.

4. The semiconductor device of claim 1 , further comprising an underfill that fills a gap between the semiconductor die and the substrate.

5. The semiconductor device of claim 1 , wherein the EMI shield layer comprises a non-sputtered EMI shield layer.

6. The semiconductor device of claim 1 , wherein the EMI shield layer comprises a copper foil.

7. The semiconductor device of claim 1 , wherein the EMI shield layer comprises a spin-coated EMI shield layer.

8. The semiconductor device of claim 1 , wherein the EMI shield layer comprises a jet-printed EMI shield layer.

9. A semiconductor device comprising:

a semiconductor die including a first surface, a second surface opposite to the first surface, a third surface formed between the first surface and the second surface, and a plurality of interconnection structures formed on the second surface;

a non-sputtered EMI shield layer comprising an upper surface and a lower surface opposite the upper surface, wherein the lower surface faces the first surface of the semiconductor die;

a plurality of EMI shielding wires positioned about the third surface of the semiconductor die, the plurality of EMI shielding wires physically and electrically connected to the upper surface of the non-sputtered EMI shield layer;

a substrate comprising a first substrate surface, a second substrate surface opposite the first substrate surface, conductive traces, and a ground circuit pattern exposed on the first substrate surface, wherein the plurality of interconnection structures of the semiconductor die are physically connected to the conductive traces exposed on the first substrate surface, and wherein the plurality of EMI shielding wires are physically and electrically connected to the ground circuit pattern exposed on the first substrate surface; and

an encapsulating portion encapsulating and directly contacting the non-sputtered EMI shield layer, the EMI shielding wires, and the first substrate surface.

10. The semiconductor device of claim 9 , wherein the non-sputtered EMI shield layer comprises a material selected from a conductive polymer, a conductive ink, a conductive paste, and a conductive foil.

11. The semiconductor device of claim 9 , wherein the plurality of EMI shielding wires traverse and inductively shield the third surface of the semiconductor die.

12. The semiconductor device of claim 11 , wherein the plurality of EMI shielding wires are spaced apart from the third surface of the semiconductor die.

13. The semiconductor device of claim 9 , wherein:

the non-sputtered EMI shield layer has a rectangular shape with four sides; and

the plurality of EMI shielding wires are arranged along the four sides.

14. A semiconductor device comprising:

a semiconductor die including a first surface, a second surface opposite to the first surface, a third surface formed between the first surface and the second surface, and a plurality of interconnection structures formed on the second surface;

a substrate electrically connected to the plurality of interconnection structures of the semiconductor die;

an encapsulating portion encapsulating the first surface of the semiconductor die and the third surface of the semiconductor die, the encapsulating portion comprising a first surface over the first surface of the semiconductor die and a side surface between the first surface of the encapsulating portion and the substrate; and

an EMI shield layer comprising a first surface on the side surface of the encapsulating portion and a second surface opposite the first surface of the EMI shield layer, wherein the second surface of the EMI shield layer slants from the substrate toward the semiconductor die and the first surface of the encapsulating portion, and wherein at least a portion of the first surface of the encapsulating portion is exposed by the EMI shield layer.

15. The semiconductor device of claim 14 , wherein the substrate further includes an antenna pattern that traverses the EMI shield layer.

16. The semiconductor device of claim 14 , wherein the EMI shield layer comprises a non-sputtered EMI shield layer.

17. The semiconductor device of claim 15 , wherein the EMI shield layer shields the semiconductor device from the antenna pattern.

18. The semiconductor device of claim 15 , wherein the encapsulating portion further encapsulates the antenna pattern.

19. The semiconductor device of claim 15 , wherein the antenna pattern extends beyond the encapsulating portion.