IP Library › Granted Patent US 10,615,191
Granted Patent B2
US 10,615,191 · App. 15/494,000 · Granted Apr 7, 2020

Polymer substrate for flexible electronics microfabrication and methods of use

Inventors: Radu Reit (Carrollton, TX); Adrian Avendano-Bolivar (Plano, TX); David Arreaga-Salas (Garland, TX)
Assignee: ARES MATERIALS INC.
H01L27/1266B05D1/005B05D1/28B05D3/007H01L27/1218H01L27/1225H01L29/7869H01L29/78603H05K1/189H01L27/3262H01L51/0097H01L2227/326H01L2251/5338H05K1/0393H05K2201/0108
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Quick Facts
Patent No.
US 10,615,191
App. No.
15/494,000
Granted
Apr 7, 2020
Kind
B2
Abstract

Provided are flexible electronics stacks and methods of use. An example flexible electronics stack includes a flexible polymeric substrate film and a rigid inorganic electronic component. The flexible polymeric substrate film includes a thermoset polymer prepared by curing a monomer solution; wherein the monomer solution comprises about 25 wt % to about 65 wt % of one or more thiol monomers and from about 25 wt % to about 65 wt % of one or more co-monomers.

Claims (13)

1. A method of making a flexible polymeric substrate film comprising: providing a monomer solution comprising about 25 wt % to about 65 wt % of one or more thiol monomers and from about 25 wt % to about 65 wt % of one or more co-monomers; depositing the monomer solution on a carrier; curing the monomer solution to provide the flexible polymeric substrate film on the carrier; depositing an interfacial adhesion layer atop the flexible polymeric substrate film; and coupling a rigid inorganic electronic component to the flexible polymeric substrate film by attaching the rigid inorganic electronic component to the interfacial adhesion layer.

2. The method of claim 1 , wherein the monomer solution comprises a solvent fraction less than 50% by weight.

3. The method according to claim 1 , wherein the flexible polymeric substrate film is formed into its final shape using at least one of the following apparatuses: an oven; a slot die coater; a rod coater; a blade coater; a spin coater; or a reaction injection mold.

4. The method according to claim 1 , wherein the monomer solution is off-stoichiometrically balanced with at least 5% excess mols of the thiol monomers.

5. The method according to claim 1 , wherein the monomer solution is off-stoichiometrically balanced with at least 5% excess mols of the comonomers.

6. The method according to claim 1 , wherein the flexible polymeric substrate film may be peeled off of the carrier.

7. The method according to claim 1 , wherein the interfacial adhesion layer is deposited through electron beam evaporation, molecular beam epitaxy, reactive ion sputtering, pulsed laser deposition, atomic layer deposition, chemical vapor deposition, electroplating, or spin coating.

8. The method according to claim 1 , wherein the interfacial adhesion layer comprises a metal selected from the group consisting of Lithium, Sodium, Potassium, Beryllium, Magnesium, Calcium, Titanium, Vanadium, Chromium, Manganese, Copper, Zinc, Yttrium, Zirconium, Niobium, Molybdenum, Ruthenium, Palladium, Silver, Iridium, Platinum, Gold, Mercury, Aluminum, Gallium, Indium, Tin, Thallium, Lead, Bismuth, and any combination thereof.

9. The method according to claim 1 , wherein the interfacial adhesion layer comprises an element selected from the group consisting of Boron, Silicon, Germanium, Arsenic, Antimony, Tellurium, Polonium, and any combination thereof.

10. The method according to claim 1 , wherein the interfacial adhesion layer comprises titanium oxide, vanadium oxide, copper oxide, indium tin oxide, tungsten sulfide, ferric sulfide, molybdenum disulfide, silicon sulfide, gallium selenide, indium selenide, cadmium selenide, cadmium telluride, bismuth telluride, lead telluride, or a combination thereof.

11. The method according to claim 1 , wherein the rigid inorganic electronic component is selected from the group consisting of an application-specific integrated circuit (ASIC), a system-on-chip (SOC), a central processing unit, a graphical processing unit, a microcontroller, a wireless transceiver, a field-programmable gate array (FPGA), a digital signal processor (DSP), an analog-to-digital converter (ADC), a display row or column driver for active matrix backplanes, an amplifier, a photosensor, a pressure sensor, a temperature sensor, a surface-mount resistor, capacitor, inductor, or a combination thereof.

12. The method according to claim 1 , wherein the rigid inorganic electronic component is attached to the interfacial adhesion layer using isotropically conductive adhesives, anisotropically conductive adhesives, non-conductive adhesives, or direct metal alloying.

13. The method according to claim 1 , wherein the rigid inorganic electronic component is attached to the interfacial adhesion layer using Sn solder reflow, Sn, Cu (1−x) solder reflow, Sn Ag (1−x) solder reflow, Sn Sb (1−x) solder reflow, In Sn (1−x) solder reflow, Bi Sn (1−x) solder reflow, or a combination thereof.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2019
From: REIT, RADU; AVENDANO-BOLIVAR, ADRIAN
To: ARES MATERIALS INC.
Reel/Frame 048247/0614 →
Continuity (4)
Provisional Application 62339410 · May 20, 2016
Provisional Application 62339418 · May 20, 2016
Provisional Application 62413330 · Oct 26, 2016
Related Publication 20170338254A1 · Nov 23, 2017
Cited By (1)
US 12,221,515