Method for forming a semiconductor structure containing high mobility semiconductor channel materials
A method of forming a semiconductor structure is provided. The method includes providing a substrate comprising, from bottom to top, a handle substrate, an insulator layer and a germanium-containing layer. Next, hard mask material portions having an opening that exposes a portion of the germanium-containing layer are formed on the substrate. An etch is then performed through the opening to provide an undercut region in the germanium-containing layer. A III-V compound semiconductor material is grown within the undercut region by utilizing an aspect ratio trapping growth process. Next, portions of the III-V compound semiconductor material are removed to provide III-V compound semiconductor material portions located between remaining portions of the germanium-containing layer.
1. A method of forming a semiconductor structure, the method comprising:
providing a substrate comprising, from bottom to top, a handle substrate, an insulator layer and a germanium-containing semiconductor material layer;
forming hard mask material portions having an opening that physically exposes a portion of the germanium-containing semiconductor material layer on the substrate;
etching through the opening to remove the physically exposed portion of the germanium-containing semiconductor material layer and to provide an undercut region in the germanium-containing semiconductor material layer, the undercut region is located between two remaining portions of the germanium-containing semiconductor material layer;
growing a III-V compound semiconductor material within the undercut region and laterally outwards from sidewall surfaces of the two remaining portions of the germanium-containing semiconductor material layer; and
removing portions of the III-V compound semiconductor material to provide III-V compound semiconductor material portions located between the two remaining portions of the germanium-containing semiconductor material layer.
2. The method of claim 1 , wherein the germanium-containing semiconductor material layer is selected from unalloyed germanium, a silicon germanium alloy and a multilayered stack of germanium and a silicon germanium alloy.
3. The method of claim 1 , wherein the etching comprises a lateral etch.
4. The method of claim 3 , wherein the lateral etch comprises hydrogen peroxide or gaseous HCl.
5. The method of claim 3 , wherein after the etching, one of the hard mask material portions overhangs one of the two remaining portions of the germanium-containing semiconductor material layer, and another of the hard mask material portions overhangs another of the two remaining portions of the germanium-containing semiconductor material layer.
6. The method of claim 1 , wherein the removing the portions of the III-V compound semiconductor material comprises forming trench isolation openings that extend to topmost surface of the insulator layer, and forming a trench dielectric structure within each of the trench isolation openings.
7. The method of claim 6 , wherein the forming the trench dielectric structure comprises filling each trench isolation opening with a trench dielectric material, and removing an upper portion of the trench dielectric material and each of the hard mask material portions.
8. The method of claim 7 , further comprising forming a first functional gate structure on a surface of each of the III-V compound semiconductor material portions and forming a second functional gate structure on a surface of each of the two remaining portions of the germanium-containing semiconductor material layer.
9. The method of claim 1 , wherein the removing the portions of the III-V compound semiconductor material comprises forming trench isolation openings that extend into the handle substrate, and forming a trench dielectric structure within each of the trench isolation openings.
10. The method of claim 9 , wherein the forming the trench dielectric structure comprises filling each trench isolation opening with a trench dielectric material, and removing an upper portion of the trench dielectric material and each of the hard mask material portions.
11. The method of claim 10 , further comprising forming a first functional gate structure on a surface of each of the III-V compound semiconductor material portions and forming a second functional gate structure on a surface of each of the two remaining portions of the germanium-containing semiconductor material layer.
12. The method of claim 11 , wherein prior to forming the first and second functional gate structures, each of the III-V compound semiconductor material portions and each of the two remaining portions of the germanium-containing semiconductor material layer are patterning into fins.
13. The method of claim 1 , wherein the III-V compound semiconductor material has defects that terminate at an overhanging portion of a bottommost surface of each hard mask material portion.
14. The method of claim 13 , wherein the defects are threading dislocations.
15. The method of claim 9 , wherein the removing the portions of the III-V compound semiconductor material comprises forming the trench isolation openings that extend into the handle substrate provides a pedestal portion to the handle substrate.
16. The method of claim 15 , wherein dopants are present in the pedestal portion.
17. The method of claim 16 , wherein the dopants comprise n-type dopants or p-type dopants.
18. The method of claim 16 , further comprising applying a back gate bias so as to convert the pedestal portion into a semiconductor back gate pedestal portion.
19. A method of forming a semiconductor structure, the method comprising:
providing a substrate comprising, from bottom to top, a handle substrate, an insulator layer and a germanium-containing semiconductor material layer;
forming hard mask material portions having an opening that physically exposes a portion of the germanium-containing semiconductor material layer on the substrate;
etching through the opening to remove the physically exposed portion of the germanium-containing semiconductor material layer and to provide an undercut region in the germanium-containing semiconductor material layer, the undercut region is located between two remaining portions of the germanium-containing semiconductor material layer;
growing a III-V compound semiconductor material within the undercut region and laterally outwards from sidewall surfaces of the two remaining portions of the germanium-containing semiconductor material layer, wherein the III-V compound semiconductor material contains defect regions that are present in the undercut region; and
removing portions of the III-V compound semiconductor material including the entirety of each defect containing region to provide III-V compound semiconductor material portions located between the two remaining portions of the germanium-containing semiconductor material layer.