IP Library Granted Patent US 10,513,433
Granted Patent B2
US 10,513,433 · App. 15/529,470 · Granted Dec 24, 2019

Laminated ceramic chip component including nano thin film layer, manufacturing method therefor, and atomic layer vapor deposition apparatus therefor

Inventors: Jin Ha Hwang (Seoul, KR); Dae Bum Park (Gyeonggi-do, KR); Yong Jo Choo (Gyeonggi-do, KR); Hyun Suk Kim (Gyeonggi-do, KR); Da Hee Park (Seoul, KR); Myeong Hee Ko (Seoul, KR); Kyoung Woo Kwon (Seoul, KR); Hee Su Hwang (Seoul, KR); Jeong Wan Choi (Seoul, KR)
Assignees: HONGIK UNIVERSITY INDUSTRY-ACADEMIC CORPORATION FOUNDATION; MAX TECH CO., LTD.
B82B3/0009B32B18/00B82B3/008C23C16/403C23C16/458C23C16/45544C23C16/45555C23C16/45561C23C16/46H01G4/005H01G4/232H01G4/2325H01G4/30H01G4/33H01G13/00H01G13/006H05K3/3442B32B37/00B32B2037/246B32B2307/20C04B2237/34C04B2237/341C04B2237/343C04B2237/345C04B2237/348C04B2237/366C04B2237/368C04B2237/704H01G4/12H05K2201/10636Y02P70/611Y02P70/613
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Quick Facts
Patent No.
US 10,513,433
App. No.
15/529,470
Granted
Dec 24, 2019
Kind
B2
Abstract

The present disclosure discloses the laminated ceramic chimp component including an element part having a ceramic main body and an internal electrode placed in the ceramic main body; an external electrode part having a first external electrode and a second external electrode, the first and second external electrodes being provided with side electrodes covering both side surfaces of the ceramic main body, respectively, upper electrodes covering portions of both sides of an upper surface of the ceramic main body, respectively, and lower electrodes covering portions of both sides of a lower surface of the ceramic main body, respectively; and a nano thin film layer formed of electric insulation material and applied to a region including the upper electrodes, the method for manufacturing the same and the atomic layer deposition apparatus for the same.

Claims (13)

1. A method for manufacturing a laminated ceramic chip component provided with a nano thin film layer, the laminated ceramic chip component comprises;

an element part including a ceramic main body and an internal electrode placed in the ceramic main body;

an external electrode part including a first external electrode and a second external electrode, the first and second external electrodes being provided with side electrodes covering both side surfaces of the ceramic main body, respectively, upper electrodes covering portions of both sides of an upper surface of the ceramic main body, respectively, and lower electrodes covering portions of both sides of a lower surface of the ceramic main body, respectively; and

a nano thin film layer formed of electric insulation material and applied to a region including the upper electrodes,

wherein the nano thin film layer is applied by an atomic layer deposition process,

wherein the nano thin film layer is formed of Al 2 O 3 layer,

wherein the atomic layer deposition process is performed at the deposition temperature of 80 to 200° C.,

wherein the aluminum supplying source is trimethyl aluminum (TMA; Al(CH 3 ) 3 ),

wherein a process cycle including supplying the aluminum supplying source for 0.1 to 1.5 seconds, supplying an inert gas for 30 to 100 seconds to perform a purge, then supplying the oxygen supplying source for 0.1 to 1.5 second and supplying the inert gas for 30 to 100 seconds to perform a purge is repeatedly carried out,

wherein the nano thin film layer is removed when the laminated ceramic chip component is soldered to an electrode pad of a circuit board.

2. The method for manufacturing the laminated ceramic chip component provided with the nano thin film layer of claim 1 , wherein the oxygen supplying source is water vapor, oxygen, ozone or oxygen plasma.

3. The method for manufacturing the laminated ceramic chip component provided with the nano thin film layer of claim 1 , wherein the nano thin film layer is formed on a whole outer surface of the external electrode part.

4. The method for manufacturing the laminated ceramic chip component provided with the nano thin film layer of claim 1 , wherein the nano thin film layer is also formed on an outer surface of the ceramic main body exposed between the first external electrode and the second external electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2017
From: HWANG, JIN HA; PARK, DAE BUM; CHOO, YONG JO; KIM, HYUN SUK; PARK, DA HEE; KO, MYEONG HEE; KWON, KYOUNG WOO; HWANG, HEE SU; CHOI, JEONG WAN
To: HONGIK UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION; MAX TECH CO., LTD.
Reel/Frame 042499/0647 →
Continuity (1)
Related Publication 20170260046A1 · Sep 14, 2017