IP Library Granted Patent US 10,486,263
Granted Patent B2
US 10,486,263 · App. 15/537,646 · Granted Nov 26, 2019

Room-temperature-bonded semiconductor device and manufacturing method of room-temperature-bonded semiconductor device

Inventors: Jun Utsumi (Tokyo, JP); Takayuki Goto (Tokyo, JP); Takenori Suzuki (Tokyo, JP); Kensuke Ide (Tokyo, JP)
Assignee: MITSUBISHI HEAVY INDUSTRIES MACHINE TOOL CO., LTD.
B23K20/02B23K20/00B23K20/22B32B37/14B81C3/001H01L21/02H01L21/187H01L21/2007H01L23/49827H01L23/49833H01L2224/05572H01L2224/80895H01L2924/0002H01L2924/15787
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Quick Facts
Patent No.
US 10,486,263
App. No.
15/537,646
Granted
Nov 26, 2019
Kind
B2
Abstract

Provided is a semiconductor device formed by performing bonding at room temperature with respect to a wafer in which bonded electrodes and insulating layers and are respectively exposed to front surfaces, including a bonding interlayer which independently exhibits non-conductivity and exhibits conductivity by being bonded to the bonded electrodes, between the front surfaces.

Claims (32)

1. A room-temperature-bonding semiconductor device, comprising:

one substrate with semiconductor base materials including conductive materials and insulating materials in a surface thereof as a bonded surface;

another substrate with semiconductor base materials including conductive materials and insulating materials in a surface thereof as a bonded surface; and

a bonding interlayer which is disposed between the one substrate and the another substrate in contact with the entire bonded surface of the one substrate and the entire bonded surface of the another substrate and which has portions with conductivity by contact with the conductive materials of the one substrate and the another substrate which ensure the conductivity between the conductive materials of the one substrate and the conductive materials of the another substrate and portions with non-conductivity in contact with the insulating materials of the one substrate and the another substrate.

2. The room-temperature-bonded semiconductor device according to claim 1 ,

wherein the insulating materials of the one substrate and the insulating materials of the another substrate are bonded together via the bonding interlayer.

3. The room-temperature-bonded semiconductor device according to claim 1 ,

wherein the bonding interlayer is formed of an amorphous semiconductor material.

4. The room-temperature bonded semiconductor device according to claim 1 ,

wherein at least one of the one substrate and the another substrate is formed such that the conductive materials are formed to be protruded in a direction perpendicular to the bonding interlayer to the bonding interlayer compared to the insulating materials a height position of the insulating material of the bonded surface is lower than that of the conductive material.

5. A manufacturing method of a room-temperature-bonded semiconductor device including, comprising:

one substrate with semiconductor base materials including conductive materials and insulating materials being formed in a surface thereof as a bonded surface;

another substrate with semiconductor base materials including conductive materials and insulating materials being formed in a surface thereof as a bonded surface; and

a bonding interlayer which is disposed between the one substrate and the another substrate in contact with the entire bonded surface of the one substrate and the entire bonded surface of the another substrate, one surface thereof being bonded to the bonded surface of the one substrate and another surface thereof being bonded to the bonded surface of the another substrate, and which has portions with conductivity obtained by the contact with the conductive materials of the one substrate and the another substrate bonded thereto and portions with non-conductivity bonded to the insulating materials of the one substrate and the another substrate, the method comprising the steps of:

respectively activating the bonded surfaces of the substrates;

after the activating step, forming a bonding interlayer which independently exhibits non-conductivity and exhibits conductivity by being bonded to the conductive material, on at least one of the activated bonded surfaces; and

after the forming step, performing pressure-welding with respect the one substrate and the another substrate via the bonding interlayer,

wherein, in the forming step, a semiconductor material is sputtered by being irradiated with a fast atom beam, and thus, the bonding interlayer is formed on the bonded surface of the one substrate, and then, the bonding interlayer formed on the bonded surface is irradiated with a fast atom beam, and a part of the semiconductor material forming the bonding interlayer is sputtered, and thus, the bonding interlayer is formed on the bonded surface of the another substrate.

6. A manufacturing method of a room-temperature-bonded semiconductor device including

one substrate with semiconductor base materials including conductive materials and insulating materials being formed in a surface thereof as a bonded surface;

another substrate with semiconductor base materials including conductive materials and insulating materials being formed in a surface thereof as a bonded surface; and

a bonding interlayer which is disposed between the one substrate and the another substrate in contact with the entire bonded surface of the one substrate and the entire bonded surface of the another substrate, one surface thereof being bonded to the bonded surface of the one substrate and another surface thereof being bonded to the bonded surface of the another substrate, and which has portions with conductivity obtained by the contact with the conductive materials of the one substrate and the another substrate bonded thereto and portions with non-conductivity bonded to the insulating materials of the one substrate and the another substrate, the method comprising the steps of:

respectively activating the bonded surfaces of the substrates;

after the activating step, forming a bonding interlayer which independently exhibits non-conductivity and exhibits conductivity by being bonded to the conductive material, on at least one of the activated bonded surfaces; and

after the forming step, performing pressure-welding with respect to the one substrate and the another substrate via the bonding interlayer,

wherein at least one of the one substrate and the another substrate is formed such that a height position of the insulating material of the bonded surface is lower than that of the conductive material, a pressure-welding load is imparted to the conductive material at the time of performing pressure welding with respect to the substrates, the conductive materials are directly bonded together and thus, the bonding interlayer is broken by the conductive material.

7. The manufacturing method of a room-temperature-bonded semiconductor device according to claim 5 , further comprising a step of:

after the pressure-welding step, heating the one substrate and the another substrate at a predetermined temperature.

8. The manufacturing method of a room-temperature-bonded semiconductor device according to claim 5 ,

wherein the bonding interlayer is formed by vapor deposition, sputtering, or chemical vapor deposition of the semiconductor material.

9. The manufacturing method of a room-temperature-bonded semiconductor device according to claim 5 ,

wherein at least one substrate and the another substrate is formed such that a height position of the insulating material of the bonded surface is lower than that of the conductive material, and a pressure-welding load is imparted to the conductive material at the time of performing pressure-welding with respect to the substrates, the conductive material are directly bonded together and thus, the bonding interlayer is broken by the conductive material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2017
From: UTSUMI, JUN; GOTO, TAKAYUKI; SUZUKI, TAKENORI; IDE, KENSUKE
To: MITSUBISHI HEAVY INDUSTRIES MACHINE TOOL CO., LTD.
Reel/Frame 042756/0204 →
Priority Claims (1)
JP 2014-259115 · Dec 22, 2014 · national
Continuity (1)
Related Publication 20170355040A1 · Dec 14, 2017