IP Library Granted Patent US 10,083,948
Granted Patent B2
US 10,083,948 · App. 15/539,447 · Granted Sep 25, 2018

Semiconductor device, method for manufacturing same, and semiconductor module

Inventors: Kan Yasui (Tokyo, JP); Kazuhiro Suzuki (Tokyo, JP); Takafumi Taniguchi (Tokyo, JP)
Assignee: Hitachi, Ltd.
H01L25/18H01L23/28H01L24/05H01L25/07H01L29/78H01L29/872H01L2224/04042H01L2224/06181H01L2224/4847H01L2224/48227H01L2224/4917H01L2224/49111H01L2224/73265H01L2224/92247H01L2224/94H01L2924/0002H01L2924/10272
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Quick Facts
Patent No.
US 10,083,948
App. No.
15/539,447
Granted
Sep 25, 2018
Kind
B2
Abstract

In order to form, in a wide band gap semiconductor device, a high field resistant sealing material having a large end portion film thickness, said high field resistant sealing material corresponding to a reduced termination region having a high field intensity, and to improve accuracy and shorten time of manufacturing steps, this semiconductor device is configured as follows. At least a part of a cross-section of a high field resistant sealing material formed close to a termination region at the periphery of a semiconductor chip has a perpendicular shape at a chip outer peripheral end portion, said shape having, on the chip inner end side, a film thickness that is reduced toward the inner side. In a semiconductor device manufacturing method for providing such semiconductor device, the high field resistant sealing material is formed in a semiconductor wafer state, then, heat treatment is performed, and after dicing is performed, a chip is mounted.

Claims (31)

1. A semiconductor device, comprising a semiconductor chip in which a wide gap semiconductor element is formed,

wherein a cross-sectional shape of a highly electric field resistant sealing material formed on a metal wiring in a peripheral portion of the semiconductor chip at a pattern surface side of the chip has an end face shape at least in part perpendicular or substantially perpendicular at a chip outer peripheral end side, and a shape in which a film thickness decreases continuously toward an inside at a chip inner peripheral end side; and

wherein the wide gap semiconductor element comprises silicon carbide.

2. The semiconductor device according to claim 1 , wherein

the highly electric field resistant sealing material comprises at least one of polyamide imide resin, polyether amide imide resin, and polyether amide resin.

3. The semiconductor device according to claim 1 , wherein

the highly electric field resistant sealing material has the film thickness of at least 50 μm and not more than 500 μm.

4. The semiconductor device according to claim 1 , wherein

a relative permittivity of the highly electric field resistant sealing material is smaller than a relative permittivity of an underlying inorganic material layer and larger than a relative permittivity of an upper layer sealing material.

5. The semiconductor device according to claim 1 , wherein

a portion where the chip outer peripheral end side has at least in part an end face shape perpendicular or substantially perpendicular is recessed from a chip end by at most one third of a width of an electric field relaxation region.

6. A method for manufacturing a semiconductor device comprising a semiconductor chip in which a wide gap semiconductor element is formed, the method comprising the steps of:

forming a highly electric field resistant sealing material on a metal wiring in a peripheral portion of the semiconductor chip on a pattern surface side of the chip in a semiconductor wafer state, such that a cross-sectional shape of the highly electric field resistant sealing material has an end face shape at least in part perpendicular or substantially perpendicular at a chip outer peripheral end side, and a shape in which a film thickness decreases continuously toward an inside at a chip inner peripheral end side;

performing heat treatment on the semiconductor wafer; and

performing dicing on the heat-treated semiconductor wafer;

wherein the wide gap semiconductor element comprises silicon carbide.

7. The method for manufacturing a semiconductor device according to claim 6 , wherein

a temperature of the heat treatment is in a range of 200° C. to 400° C.

8. The method for manufacturing a semiconductor device according to claim 6 , wherein

the step of forming a highly electric field resistant sealing material includes a step of coating the highly electric field resistant sealing material at least in two directions crossing each other along a scribe line of a wafer.

9. A semiconductor module, comprising a semiconductor chip in which a wide gap semiconductor element is formed,

wherein, in the semiconductor chip, a cross-sectional shape of a highly electric field resistant sealing material formed on a metal wiring in a peripheral portion of the semiconductor chip at a pattern surface side of the chip has at least in part an end face shape perpendicular or substantially perpendicular at a chip outer peripheral end side, and a shape in which a film thickness decreases continuously toward an inside at a chip inner peripheral end side; and

wherein the wide gap semiconductor element comprises silicon carbide.

10. The semiconductor module according to claim 9 , wherein

the highly electric field resistant sealing material comprises at least one of polyamide imide resin, polyether amide imide resin, and polyether amide resin.

11. The semiconductor module according to claim 9 , wherein

the highly electric field resistant sealing material has the film thickness of at least 50 μm and not more than 500 μm.

12. The semiconductor module according to claim 9 , wherein

a relative permittivity of the highly electric field resistant sealing material is smaller than a relative permittivity of an underlying inorganic material layer and larger than a relative permittivity of an upper layer sealing material.

13. The semiconductor module according to claim 9 , wherein

a portion where the chip outer peripheral end side having at least in part an end face shape perpendicular or substantially perpendicular is recessed from a chip end by at most one third of a width of an electric field relaxation region.

Assignments (3)
CHANGE OF NAME Recorded Apr 30, 2025
From: HITACHI POWER SEMICONDUCTOR DEVICE LTD.
To: MINEBEA POWER SEMICONDUCTOR DEVICE INC.
Reel/Frame 071142/0232 →
NUNC PRO TUNC ASSIGNMENT Recorded Apr 22, 2022
From: HITACHI, LTD.
To: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
Reel/Frame 059779/0399 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2017
From: YASUI, KAN; SUZUKI, KAZUHIRO; TANIGUCHI, TAKAFUMI
To: HITACHI, LTD.
Reel/Frame 042798/0942 →
Continuity (1)
Related Publication 20170352648A1 · Dec 7, 2017
Cited By (1)
US 12,341,373