Silicon carbide semiconductor device
A silicon carbide semiconductor device includes a silicon carbide substrate and a gate insulating film. The silicon carbide substrate has a first main surface and a second main surface opposite to the first main surface. The gate insulating film is provided on the first main surface. The silicon carbide substrate includes a first body region having p type, a second body region having p type, and a JFET region provided between the first body region and the second body region and having n type. The JFET region has both a first impurity capable of providing the p type and a second impurity capable of providing the n type. A concentration of the second impurity is higher than a concentration of the first impurity. The silicon carbide semiconductor device capable of suppressing dielectric breakdown of the gate insulating film is provided.
1. A silicon carbide semiconductor device comprising:
a silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface; and
a gate insulating film provided on the first main surface,
the silicon carbide substrate including
a first body region being in contact with the gate insulating film at the first main surface and having a first conductivity type,
a second body region being in contact with the gate insulating film at the first main surface and having the first conductivity type, and
a JFET region provided between the first body region and the second body region and having a second conductivity type different from the first conductivity type,
the JFET region having both a first impurity capable of providing the first conductivity type and a second impurity capable of providing the second conductivity type,
a concentration of the second impurity being higher than a concentration of the first impurity,
the first conductivity type being p type and the second conductivity type being n type, and
the concentration of the first impurity increases from the second main surface toward the first main surface.
2. The silicon carbide semiconductor device according to claim 1 , wherein
a density of threading dislocations in the first main surface is not less than 100 cm −2 and not more than 10000 cm −2 .
3. The silicon carbide semiconductor device according to claim 1 , wherein
the first impurity is aluminum.
4. The silicon carbide semiconductor device according to claim 1 , wherein
the concentration of the second impurity is not less than 1×10 14 cm −3 and not more than 1×10 16 cm −3 .
5. The silicon carbide semiconductor device according to claim 1 , wherein
the silicon carbide substrate includes a first cell region having an outer shape of a polygon as seen along a direction perpendicular to the first main surface, and a second cell region sharing one side of the polygon with the first cell region and having an outer shape of the polygon as seen along the direction perpendicular to the first main surface, and
the JFET region includes an end of the one side.
6. A silicon carbide semiconductor device comprising:
a silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface; and
a gate insulating film provided on the first main surface,
the silicon carbide substrate including
a first body region being in contact with the gate insulating film at the first main surface and having a first conductivity type,
a second body region being in contact with the gate insulating film at the first main surface and having the first conductivity type, and
a JFET region provided between the first body region and the second body region and having a second conductivity type different from the first conductivity type,
the JFET region having both a first impurity capable of providing the first conductivity type and a second impurity capable of providing the second conductivity type,
a concentration of the second impurity being higher than a concentration of the first impurity,
the first conductivity type being p type and the second conductivity type being n type,
the silicon carbide substrate includes a first cell region having an outer shape of a polygon as seen along a direction perpendicular to the first main surface, and a second cell region sharing one side of the polygon with the first cell region and having an outer shape of the polygon as seen along the direction perpendicular to the first main surface, and
the JFET region includes an end of the one side.
7. The silicon carbide semiconductor device according to claim 6 , wherein
a density of threading dislocations in the first main surface is not less than 100 cm −2 and not more than 10000 cm −2 .
8. The silicon carbide semiconductor device according to claim 6 , wherein
the first impurity is aluminum.
9. The silicon carbide semiconductor device according to claim 6 , wherein
the concentration of the second impurity is not less than 1×10 14 cm −3 and not more than 1×10 16 cm −3 .