Mixed cross point memory
View Patent ↗Methods, systems, and devices for multi-deck memory arrays are described. A multi-deck memory device may include a memory array with a cell having a self-selecting memory element and another array with a cell having a memory storage element and a selector device. The device may be programmed to store multiple combinations of logic states using cells of one or more decks. Both the first deck and second deck may be coupled to at least two access lines and may have one access line that is a common access line, coupling the two decks. Additionally, both decks may overlie control circuitry, which facilitates read and write operations. The control circuitry may be configured to write a first state or a second state to one or both of the memory decks via the access lines.
1. A memory device, comprising:
a first array of memory cells that comprises at least one self-selecting memory storage element;
a second array of memory cells that comprises at least one memory storage element and at least one selector device, wherein the first array is coupled to the second array; and
control circuitry coupled to the first array and the second array, wherein at least one of the first array or the second array overlie at least a portion of the control circuitry.
2. The memory device of claim 1 , wherein at least one memory cell of the second array is coupled to a same access line as at least one memory cell of the first array and the control circuitry is coupled to the same access line as the first array and the second array.
3. The memory device of claim 1 , wherein at least one memory cell of the first array is coupled to a first access line, at least one memory cell of the second array is coupled to a second access line different from the first access line, and wherein the control circuitry is coupled to the first access line and the second access line.
4. The memory device of claim 1 , wherein the first array comprises a first deck of a three-dimensional cross point memory architecture and the second array comprises a second deck of the three-dimensional cross point memory architecture.
5. The memory device of claim 4 , wherein a first pitch of the first deck is different from a second pitch of the second deck in at least one direction.
6. The memory device of claim 4 , wherein a first pitch of the first deck and a second pitch of the second deck comprise a same pitch in at least one direction.
7. The memory device of claim 1 , wherein the at least one self-selecting memory storage element of each cell of the first array and the at least one selector device and the at least one memory storage element of each cell of the second array each comprise a chalcogenide material.
8. The memory device of claim 7 , wherein the at least one memory storage element comprises a phase change material (PCM).
9. The memory device of claim 7 , wherein the at least one self-selecting memory storage element comprises a first chalcogenide material having a first composition and selector device comprises a second chalcogenide material having a second composition different from the first composition.
10. The memory device of claim 1 , wherein each cell of the first array is aligned with at least one cell of the second array.