Transistor, electronic device, manufacturing method of transistor
View Patent ↗Reducing the power consumption of a transistor and stably controlling its threshold value. Providing a transistor comprising a first conductive layer, a first insulating layer and a second insulating layer over the first conductive layer, a semiconductor layer over the first insulating layer, a third insulating layer over the first conductive layer and the semiconductor layer, a second conductive layer over the second insulating layer, and a gate electrode over the third insulating layer. The first conductive layer is in an electrically floating state. The first conductive layer has a region overlapping with the semiconductor layer with the first insulating layer provided therebetween, a region overlapping with the second conductive layer with the second insulating layer provided therebetween, and a region overlapping with the gate electrode with the third insulating layer provided therebetween.
1. A transistor comprising:
a first conductive layer over a substrate, the first conductive layer functioning as a floating gate;
a first insulating layer and a second insulating layer over the first conductive layer;
a semiconductor layer over the first insulating layer;
a third insulating layer over the semiconductor layer and the first conductive layer;
a second conductive layer over the second insulating layer, the second conductive layer functioning as a control gate; and
a third conductive layer over the third insulating layer, the third conductive layer functioning as a gate electrode,
wherein the first conductive layer comprises:
a first region overlapping with the semiconductor layer with the first insulating layer therebetween;
a second region overlapping with the second conductive layer with the second insulating layer therebetween in a channel width direction; and
a third region overlapping with the third conductive layer with the third insulating layer therebetween,
wherein a thickness of the first insulating layer is larger than a thickness of the second insulating layer, and
wherein the second conductive layer does not overlap with the semiconductor layer and the third conductive layer in a top view.
2. The transistor according to claim 1 , wherein the first conductive layer is in an electrically floating state.
3. The transistor according to claim 1 , wherein the thickness of the first insulating layer is larger than a thickness of the third insulating layer.
4. The transistor according to claim 1 , wherein the semiconductor layer comprises an oxide semiconductor.
5. The transistor according to claim 1 , further comprising:
a fourth insulating layer over the first insulating layer; and
a fourth conductive layer over the fourth insulating layer.
6. The transistor according to claim 5 , wherein the thickness of the first insulating layer is larger than a thickness of the fourth insulating layer.
7. An electronic device comprising the transistor according to claim 1 .
8. A transistor comprising:
a first conductive layer over a substrate, the first conductive layer functioning as a floating gate;
a first insulating layer and a second insulating layer over the first conductive layer;
a semiconductor layer over the first insulating layer;
a third insulating layer over the semiconductor layer and the first conductive layer;
a second conductive layer over the second insulating layer, the second conductive layer functioning as a control gate; and
a third conductive layer over the third insulating layer, the third conductive layer functioning as a gate electrode,
wherein the first conductive layer comprises:
a first region overlapping with the semiconductor layer with the first insulating layer therebetween;
a second region overlapping with the second conductive layer with the second insulating layer therebetween in a channel width direction; and
a third region overlapping with the third conductive layer with the third insulating layer therebetween,
wherein a thickness of the first insulating layer is larger than a thickness of the second insulating layer,
wherein the second conductive layer does not overlap with the semiconductor layer and the third conductive layer in a top view, and
wherein the first conductive layer is configured to be injected with a charge by applying a voltage between the second conductive layer and the third conductive layer.
9. The transistor according to claim 8 , wherein the first conductive layer is in an electrically floating state.
10. The transistor according to claim 8 , wherein the thickness of the first insulating layer is larger than a thickness of the third insulating layer.
11. The transistor according to claim 8 , wherein the semiconductor layer comprises an oxide semiconductor.
12. The transistor according to claim 8 , further comprising:
a fourth insulating layer over the first insulating layer; and
a fourth conductive layer over the fourth insulating layer.
13. The transistor according to claim 12 , wherein the thickness of the first insulating layer is larger than a thickness of the fourth insulating layer.
14. An electronic device comprising the transistor according to claim 8 .