Image sensor chip scale packages and related methods
Methods of forming an image sensor chip scale package. Implementations may include providing a semiconductor wafer having a pixel array, forming a first cavity through the wafer and/or one or more layers coupled over the wafer, filling the first cavity with a fill material, planarizing the fill material and/or the one or more layers to form a first surface of the fill material coplanar with a first surface of the one or more layers, and bonding a transparent cover over the fill material and the one or more layers. The bond may be a fusion bond between the transparent cover and a passivation oxide; a fusion bond between the transparent cover and an anti-reflective coating; a bond between the transparent cover and an organic adhesive coupled over the fill material, and/or; a bond between a first metallized surface of the transparent cover and a metallized layer coupled over the wafer.
1. An image sensor chip scale package (CSP) comprising:
a wafer comprising one or more layers thereon and an array of pixels;
a cavity through one of the wafer and the one or more layers, the cavity comprising a planarized fill material that is substantially coplanar with a first surface of the one or more layers; and
a transparent cover bonded over the planarized fill material and over the one or more layers, the bond being one of:
a fusion bond between the transparent cover and a passivation oxide, and;
a fusion bond between the transparent cover and an anti-reflective coating.
2. The image sensor CSP of claim 1 , wherein no adhesive is used to bond the transparent cover over the fill material and over the one or more layers.
3. The image sensor CSP of claim 1 , further comprising wherein when the fusion bond is between the transparent cover and the anti-reflective coating (ARC), the ARC is coupled over a passivation oxide.
4. The image sensor CSP of claim 1 , wherein the anti-reflective coating (ARC) is coupled over an organic layer.
5. The image sensor CSP of claim 1 , wherein the planarized fill material is planarized using chemical mechanical polishing (CMP).
6. The image sensor CSP of claim 1 , wherein the fill material comprises an oxide.
7. The image sensor CSP of claim 1 , wherein the transparent cover comprises one of a cavity and a lens.
8. The image sensor CSP of claim 1 , further comprising a plurality of stacked semiconductor wafers.
9. The image sensor CSP of claim 1 , further comprising a second cavity comprised through one of the wafer and the one or more layers and the second cavity is filled with one of the fill material and a second fill material.
10. The image sensor CSP of claim 1 , wherein a first surface of the fill material is coplanar with a plane that intersects a color filter array (CFA) of the image sensor CSP.
11. An image sensor chip scale package (CSP) comprising:
a wafer comprising an array of pixels;
a first cavity through one of the wafer and one or more layers coupled over the wafer; the first cavity comprising a fill material;
one of the fill material and the one or more layers planarized to form a first surface of the fill material coplanar with a first surface of the one or more layers; and
a transparent cover bonded over the fill material and over the one or more layers with an organic adhesive coupled over the fill material.
12. The image sensor CSP of claim 11 , wherein the planarized first surface is planarized using chemical mechanical polishing (CMP).
13. The image sensor CSP of claim 11 , further comprising a second cavity comprised through one of the wafer and the one or more layers, the second cavity filled with one of the fill material and a second fill material, and one of the fill material and the second fill material planarized to form a second surface coplanar with the first surface of the one or more layer, the second surface directly over the second cavity.
14. The image sensor CSP of claim 11 , further comprising one or more openings comprised in a layer defining the first cavity to test one or more electrical functions of the image sensor CSP.
15. An image sensor chip scale package (CSP) comprising:
a wafer comprising an array of pixels;
a first cavity through one of the wafer and one or more layers coupled over the wafer; the first cavity comprising a fill material;
one of the fill material and the one or more layers planarized to form a first surface of the fill material coplanar with a first surface of the one or more layers; and
a first metallized surface of a transparent cover bonded with a metallized layer coupled over the wafer, the transparent cover bonded over the fill material and over the one or more layers.
16. The image sensor CSP of claim 15 , wherein no adhesive is used to bond the transparent cover over the fill material and over the one or more layers.
17. The image sensor CSP of claim 15 , wherein the first metallized surface comprises oxide in particular locations that correspond with particular locations of oxide comprised in the metallized layer.
18. The image sensor CSP of claim 15 , further comprising a second cavity through one of the wafer and the one or more layers, the second cavity filled with one of the fill material and a second fill material, one of the fill material and the second fill material planarized to form a second surface coplanar with the first surface of the fill material, and the transparent cover bonded over a full diameter of the first cavity and over at least a portion of a diameter of the second cavity.
19. The image sensor CSP of claim 15 , further comprising one of a cavity and a global lens in the transparent cover.
20. The image sensor CSP of claim 15 , further comprising at least a portion of a testing contact comprised within the first cavity, the testing contact configured to test one or more electrical functions of the image sensor CSP.