IP Library Granted Patent US 10,453,950
Granted Patent B2
US 10,453,950 · App. 15/626,690 · Granted Oct 22, 2019

Silicon carbide (SiC) device with improved gate dielectric shielding

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,453,950
App. No.
15/626,690
Granted
Oct 22, 2019
Kind
B2
Abstract

In one general aspect, an apparatus can include a silicon carbide (SiC) device can include a gate dielectric, a first doped region having a first conductivity type, a source, a body region of the first conductivity type, and a second doped region having a second conductivity type. The second doped region can have a first portion and a second portion. The first portion can be disposed between the first doped region and the body region and the second portion can be disposed between the first doped region and the gate dielectric. The first portion of the second doped region can have a width less than a width of the first doped region.

Claims (45)

1. An apparatus, comprising:

a silicon carbide (SiC) device including a gate dielectric;

a first doped region having a first conductivity type;

a source;

a body region of the first conductivity type; and

a second doped region having a second conductivity type, the second doped region having a first portion and a second portion, the first portion being disposed between the first doped region and the body region and the second portion being disposed between the first doped region and the gate dielectric, the first portion of the second doped region having a width less than a width of the first doped region, the SiC device including an epitaxial layer of the second conductivity type having a doping concentration less than a doping concentration of the second portion of the second doped region.

2. The apparatus of claim 1 , wherein the width of the first doped region is less than half a width of the first portion of the second doped region.

3. The apparatus of claim 1 , wherein at least one of the width of the first doped region or the width of the first portion of the second doped region is less than 1 micron.

4. The apparatus of claim 1 , wherein the first portion of the second doped region is aligned horizontally between the body region and the first doped region, and the second portion of the second doped region is aligned vertically between the gate dielectric and the first doped region.

5. The apparatus of claim 1 , wherein the first portion of the second doped region is contiguous with the second portion of the second doped region.

6. An apparatus, comprising:

a silicon carbide (SiC) device including a gate dielectric;

a first doped region having a first conductivity type;

a source region;

an epitaxial layer of a second conductivity type disposed below and in contact with the first doped region;

a body region of the first conductivity type; and

a second doped region having the second conductivity type, the second doped region having a first portion disposed between the first doped region and the source region, the second doped region having a second portion disposed between the first doped region and the gate dielectric, the first doped region having a non-uniform doping profile.

7. The apparatus of claim 6 , wherein a doping concentration of the first doped region is higher or lower, at a same depth, than a doping concentration of the first portion of the second doped region.

8. The apparatus of claim 6 , wherein the first portion of the second doped region has a non-uniform doping profile.

9. The apparatus of claim 6 , wherein at least one of the first doped region or the first portion of the second doped region has a Gaussian doping profile.

10. The apparatus of claim 6 , wherein the first portion of the second doped region has a substantially constant net doping concentration along a depth direction.

11. The apparatus of claim 6 , wherein the first portion of the second doped region has a uniform doping concentration along a depth direction.

12. The apparatus of claim 6 , wherein the first doped region has a peak doping concentration at a depth different than a depth of a peak doping concentration of the first portion of the second doped region.

13. The apparatus of claim 6 , wherein the first portion of the second doped region is aligned horizontally between the source region and the first doped region, and the second portion of the second doped region is aligned vertically between the gate dielectric and the first doped region.

14. An apparatus, comprising:

a silicon carbide (SiC) device including a gate dielectric;

a first doped region having a first conductivity type;

a source region;

a body region of the first conductivity type; and

a second doped region having a second conductivity type, the second doped region having a first portion disposed between the first doped region and the source region, the second doped region having a second portion disposed between the first doped region and the gate dielectric, the first doped region having a non-uniform doping profile, the first doped region has a peak doping concentration at a depth aligned with a depth of a peak doping concentration of the first portion of the second doped region.

15. The apparatus of claim 14 , wherein at least one of:

the first portion of the second doped region has a non-uniform doping profile; or

the first doped region has a non-uniform doping profile.

16. An apparatus, comprising:

a first doped region, having a first conductivity type, below a gate dielectric included in a silicon carbide (SiC) device;

a source region;

a body region of the first conductivity type; and

an epitaxial layer of a second conductivity type disposed below and in contact with the first doped region;

a second doped region having the second conductivity type, the second doped region having a first portion disposed between the first doped region and the source region, the second doped region having a second portion disposed between the first doped region and the gate dielectric, the first portion of the second doped region having a width less than a width of the first doped region.

17. The apparatus of claim 16 , wherein the first doped region is formed through the second portion of the second doped region using an ion implant process.

18. The apparatus of claim 16 , wherein the second doped region is formed after the gate dielectric is formed.

19. The apparatus of claim 16 , wherein the second doped region is formed before the gate dielectric is formed.

20. The apparatus of claim 16 , wherein at least one of:

the first portion of the second doped region has a non-uniform doping profile; or

the first doped region has a non-uniform doping profile.

Assignments (9)
SECURITY INTEREST Recorded Jul 13, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; GTAT CORPORATION
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064271/0971 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 065653/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 044481, FRAME 0594 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064074/0363 →
SECURITY INTEREST Recorded Nov 12, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058871/0799 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 057969/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0594 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2017
From: DOMEIJ, MARTIN
To: TRANSIC AB
Reel/Frame 042748/0590 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2017
From: TRANSIC AB
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 042748/0698 →