IP Library › Granted Patent US 10,672,619
Granted Patent B2
US 10,672,619 · App. 15/628,355 · Granted Jun 2, 2020

Material composition and methods thereof

Inventors: Siao-Shan Wang (Tainan, TW); Cheng-Han Wu (Taichung, TW); Ching-Yu Chang (Yilang County, TW); Chin-Hsiang Lin (Hsin-Chu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L21/3081G03F7/26G03F7/405H01L21/0273
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Quick Facts
Patent No.
US 10,672,619
App. No.
15/628,355
Granted
Jun 2, 2020
Kind
B2
Abstract

Provided is a material composition and method that includes forming a patterned resist layer on a substrate, where the patterned resist layer has a first line width roughness. In various embodiments, the patterned resist layer is coated with a treatment material, where a first portion of the treatment material bonds to surfaces of the patterned resist layer. In some embodiments, a second portion of the treatment material (e.g., not bonded to surfaces of the patterned resist layer) is removed, thereby providing a treated patterned resist layer, where the treated patterned resist layer has a second line width roughness less than the first line width roughness.

Claims (33)

1. A method, comprising:

exposing a resist layer on a substrate;

performing an in-situ treatment process of the exposed resist layer, wherein the in-situ treatment process deposits a treatment material within the exposed resist layer, wherein a first portion of the treatment material bonds to surfaces of a latent pattern within the exposed resist layer, wherein the treatment material includes one or more of a first monomer, a second monomer different than the first monomer, and a third monomer different than both the first and second monomers; and

developing the exposed resist layer, thereby removing a second portion of the treatment material to provide a treated patterned resist layer.

2. The method of claim 1 , further comprising:

after exposing the resist layer and prior to performing the in-situ treatment process, performing a baking process.

3. The method of claim 1 , wherein the removing the second portion includes removing the second portion using a solvent including at least one of n-butyl acetate (nBA), 2-heptanone, and Isoamyl acetate (IAA).

4. The method of claim 3 , wherein the solvent has a partition coefficient greater than about 1.82.

5. The method of claim 1 , wherein the first monomer includes at least one of an aliphatic compound, a C4-C20 alkyl group, a cycloalkyl group, a C4-C20 saturated or unsaturated hydrocarbon ring, and a C5-C20 heterocyclic group.

6. The method of claim 1 , wherein the first monomer has a glass transition temperature (Tg) below about 80 degrees Celsius.

7. The method of claim 1 , wherein the second monomer includes a base having an acid dissociation constant (pK a ) value greater than 7 and less than 13.

8. The method of claim 1 , wherein the second monomer includes at least one of an NH 3 group, a 1°-3° amine group, an OH − group, an NCS − group, an alkenyl group, a phenol group, a C5-C20 heterocyclic group, and a CN group.

9. The method of claim 1 , wherein the third monomer includes at least one of styrene and a phenolic compound.

10. The method of claim 1 , wherein the treatment material has a molecular weight (MW) that is less than about 20,000.

11. A method, comprising:

exposing a resist layer on a substrate to form a latent pattern within the resist layer;

performing an in-situ treatment process of the exposed resist layer, wherein the in-situ treatment process deposits a treatment material within the exposed resist layer and on sidewalls of the latent pattern, wherein the treatment material includes one or more of a first monomer, a second monomer different than the first monomer, and a third monomer different than both the first and second monomers;

after performing the in-situ treatment process, developing the exposed resist layer to provide a treated patterned resist layer.

12. The method of claim 11 , wherein the latent pattern has a first line width roughness, and wherein the treated patterned resist layer has a second line width roughness less than the first line width roughness.

13. The method of claim 11 , wherein depositing the treatment material within the exposed resist layer and on the sidewalls of the latent pattern includes bonding the treatment material to surfaces of the latent pattern by way of hydrogen bonding, ionic bonding, or covalent bonding.

14. The method of claim 11 , wherein depositing the treatment material within the exposed resist layer and on the sidewalls of the latent pattern includes diffusing the treatment material through exposed or unexposed portions of the resist layer.

15. The method of claim 11 , wherein the treatment material includes the first monomer, the second monomer different than the first monomer, and the third monomer different than both the first and second monomers.

16. A method of semiconductor device fabrication, comprising:

forming a resist layer over a substrate;

performing an exposure process to the resist layer, wherein the exposure process is performed using an EUV light source and projected onto the resist layer through an intervening mask including a circuit pattern;

after performing the exposure process, developing the exposed resist layer to form a patterned resist layer, wherein the patterned resist layer includes the circuit pattern, and wherein the patterned resist layer has a first line width roughness;

coating the patterned resist layer with a treatment material, wherein a first portion of the treatment material bonds to surfaces of the patterned resist layer, wherein the treatment material includes one or more of a first monomer, a second monomer different than the first monomer, and a third monomer different than both the first and second monomers;

removing a second portion of the treatment material to provide a treated patterned resist layer, wherein the treated patterned resist layer has a second line width roughness less than the first line width roughness; and

prior to developing the exposed resist layer, performing an in-situ treatment process of the exposed resist layer, wherein the in-situ treatment process deposits the treatment material within the exposed resist layer and on sidewalls of a latent pattern within the resist layer.

17. The method of claim 16 , wherein the circuit pattern includes one or more FinFET device circuit patterns.

18. The method of claim 16 , wherein the removing the second portion includes removing the second portion using a solvent including at least one of n-butyl acetate (nBA), 2-heptanone, and Isoamyl acetate (IAA).

19. The method of claim 16 , wherein the treatment material includes a first monomer and a second monomer that is different than the first monomer.

20. The method of claim 16 , wherein the treatment material includes the first monomer, the second monomer different than the first monomer, and the third monomer different than both the first and second monomers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2017
From: WANG, SIAO-SHAN; WU, CHENG-HAN; CHANG, CHING-YU; LIN, CHIN-HSIANG
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 042761/0135 →
Continuity (2)
Provisional Application 62434811 · Dec 15, 2016
Related Publication 20180174830A1 · Jun 21, 2018
Cited By (1)
US 12,300,490