Memory cells having resistors and formation of the same
View Patent ↗The present disclosure includes memory cells having resistors, and methods of forming the same. An example method includes forming a first conductive line, forming a second conductive line, and forming a memory element between the first conductive line and the second conductive line. Forming the memory element can include forming one or more memory materials, and forming a resistor in series with the one or more memory materials. The resistor can be configured to reduce a capacitive discharge through the memory element during a state transition of the memory element.
1. A method of forming a memory cell, comprising:
forming a first conductive line;
forming a second conductive line; and
forming a memory element between the first conductive line and the second conductive line, wherein forming the memory element includes:
forming one or more memory materials; and
forming a resistor in series with the one or more memory materials, wherein:
the resistor is configured to reduce a capacitive discharge through the memory element during a state transition of the memory element;
the resistor is a first resistor that is formed between the first conductive line and the memory element, and wherein the method includes forming at least a second resistor between the second conductive line and the memory element.
2. The method of claim 1 , wherein forming the resistor includes forming a resistor material continuous across multiple memory cells.
3. The method of claim 1 , wherein forming the one or more memory materials includes forming a single memory material serving as both a storage element and a switch element.
4. The method of claim 1 , wherein forming the one or more memory materials includes forming a first memory material serving as a storage element of the memory element and a second memory material serving as a switch element of the memory element.
5. The method of claim 1 , wherein forming at least one of the first resistor and the at least second resistor includes forming a resistor material continuous across multiple memory cells.
6. The method of claim 1 , wherein:
the first conductive line comprises a first conductive material, the second conductive line comprises a second conductive material, the first resistor comprises a first resistor material, and the second resistor comprises a second resistor material, and wherein the method includes:
forming the first resistor material on the first conductive material;
forming the second conductive material on the second resistor material;
forming the first conductive line by performing a first etch through the first conductive material, the first resistor material, the switch element, and the storage element; and
forming the second conductive line by performing a second etch through the second conductive material, the second resistor material, the switch element, and the storage element.
7. The method of claim 6 , wherein forming the second conductive line further includes etching through the first resistor material.
8. The method of claim 6 , wherein the method includes forming the second resistor material prior to performing the first etch such that performing the first etch includes etching through the second resistor material.
9. A method of forming a memory cell, comprising:
forming a first conductive line;
forming a second conductive line; and
forming a memory element between the first conductive line and the second conductive line, wherein forming the memory element includes:
forming one or more memory materials serving as a storage element and a switch element; and
forming a resistor in series with the one or more memory materials, wherein the resistor is continuous across multiple memory cells;
wherein forming the first conductive line includes forming a first conductive material, and wherein the method includes performing a first etch through a stack including the first conductive material such that the first conductive line is defined during the first etch, wherein the first resistor comprises a first resistor material that is formed on the first conductive material prior to performing the first etch such that the first resistor is defined during the first etch.
10. The method of claim 9 , wherein forming the second conductive line comprises forming a second conductive material on the memory element, and wherein the method includes performing a second etch through the second conductive material and the memory element such that the second conductive line is defined during the second etch, wherein the second resistor comprises a second resistor material that is formed on the memory element prior to performing the second etch such that the second resistor is defined along with the second conductive material.
11. The method of claim 10 , wherein the method includes performing the second etch through the first resistor material such that the first resistor is further defined during the second etch.
12. The method of claim 10 , wherein the method includes forming the second resistor material on the memory element prior to performing the first etch such that the second resistor is defined during the first and the second etch.
13. A method of forming a memory cell, comprising:
forming a first conductive line;
forming a second conductive line; and
forming a memory element between the first conductive line and the second conductive line, wherein forming the memory element includes:
forming one or more memory materials serving as a storage element and a switch element; and
forming a resistor in series with the one or more memory materials, wherein the resistor is continuous across multiple memory cells;
wherein forming the resistor in series with the storage element and the switch element comprises:
forming a dielectric material on a substrate;
performing an etch through the dielectric material;
encapsulating exposed surfaces of the dielectric material with a resistor material associated with the resistor;
performing a planarization process on the resistor material extended above sidewalls of the dielectric material; and
forming the memory element on the planarized surface of the resistor.