IP Library Granted Patent US 10,304,518
Granted Patent B2
US 10,304,518 · App. 15/633,595 · Granted May 28, 2019

Apparatuses with compensator lines laid out along wordlines and spaced apart from wordlines by dielectric, compensator lines being independently controlled relative to the wordlines providing increased on-current in wordlines, reduced leakage in coupled transistors and longer retention time in coupled memory cells

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Quick Facts
Patent No.
US 10,304,518
App. No.
15/633,595
Granted
May 28, 2019
Kind
B2
Abstract

Some embodiments include an apparatus which has a wordline coupled with a transistor gate, and which has a compensator line extending along the wordline and spaced from the wordline by a dielectric region. A driver is coupled with the wordline, and a controller is coupled with the compensator line. The wordline is coupled with access transistors, and is operated at a first voltage while the access transistors are in an OFF state. The compensator line is operated at a second voltage while the wordline is at the first voltage; with the second voltage being greater than the first voltage. The wordline is operated at a third voltage while the access transistors are in an ON state, and the compensator line is operated at a fourth voltage while the wordline is at the third voltage. The third voltage may or may not be greater than the fourth voltage.

Claims (20)

1. An apparatus, comprising:

a wordline coupled with access transistors;

a compensator line extending along the wordline, and spaced from the wordline by a dielectric region;

a driver coupled with the wordline and a controller coupled with the compensator line, wherein the compensator line is independently controlled relative to the wordline;

the compensator line, the dielectric region and the wordline together forming a stack;

the stack having a first vertical thickness, the wordline having a second vertical thickness, the compensator line having a third vertical thickness, and the dielectric region having a fourth vertical thickness;

the third vertical thickness being within a range of from about 10% to about 50% of the first vertical thickness;

the first vertical thickness being at least about 50 nm;

the fourth vertical thickness being within a range of from about 0.5% to about 6% of the first vertical thickness;

the wordline being operated at a first voltage by the driver while the access transistors are in an OFF state; and

the compensator line being operated by the controller at a second voltage while the wordline is operated at the first voltage; the second voltage being greater than the first voltage;

wherein the wordline comprises a first conductive material, and the compensator line comprises a second conductive material; wherein the first and second conductive materials comprise a common composition and said common composition includes one or both of tungsten and ruthenium.

2. The apparatus of claim 1 wherein:

the wordline is operated at a third voltage while the access transistors are in an ON state;

the compensator line is operated at the second voltage while the wordline is operated at the third voltage; and

the third voltage is greater than the second voltage.

3. The apparatus of claim 1 wherein:

the wordline is operated at a third voltage while the access transistors are in an ON state;

the compensator line is operated at a fourth voltage while the wordline is operated at the third voltage; and

the third voltage is less than or equal to the fourth voltage.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050700/0535 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046597/0393 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 5 TO PATENT SECURITY AGREEMENT Recorded Aug 8, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 043482/0776 →
SUPPLEMENT NO. 5 TO PATENT SECURITY AGREEMENT Recorded Aug 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION
Reel/Frame 043483/0686 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2017
From: PANDEY, DEEPAK CHANDRA; MOULI, CHANDRA; LIU, HAITAO
To: MICRON TECHNOLOGY, INC.
Reel/Frame 042819/0964 →