IP Library Granted Patent US 10,482,010
Granted Patent B2
US 10,482,010 · App. 15/637,516 · Granted Nov 19, 2019

Persistent host memory buffer

Inventors: James A. Boyd (Hillsboro, OR); John W. Carroll (Portland, OR); Sanjeev N. Trika (Portland, OR)
Assignee: Intel Corporation
G06F12/0246G06F12/0623G06F13/1673G06F13/1689G06F13/1694G11C7/1006
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Quick Facts
Patent No.
US 10,482,010
App. No.
15/637,516
Granted
Nov 19, 2019
Kind
B2
Abstract

An embodiment of a memory apparatus may include a persistent host memory buffer, and a memory controller communicatively coupled to the persistent host memory buffer to control communication between the persistent host memory buffer and a persistent storage media device. Other embodiments are disclosed and claimed.

Claims (42)

1. A memory apparatus, comprising:

a persistent host memory buffer; and

a memory controller communicatively coupled to the persistent host memory buffer to control communication between the persistent host memory buffer and a persistent storage media device, wherein the memory controller is further to:

pair the persistent host memory buffer with the persistent storage media device with a soft binding in response to an identification that the persistent storage media device and the persistent host memory buffer are not expected to be permanently connected to each other, and a permanent binding in response to an identification that the persistent storage media device and the persistent host memory buffer are expected to remain permanently connected to each other;

extend the persistent storage media device with the persistent host memory buffer by a utilization of the persistent host memory buffer as a write-back cache for the persistent storage media device only when the permanent binding is used to pair the persistent host memory buffer with the persistent storage media device; and

utilize the persistent host memory buffer as a write-through cache for the persistent storage media device when the soft binding is used to pair the persistent host memory buffer with the persistent storage media device.

2. The apparatus of claim 1 , wherein the memory controller is further to:

save a signature in the persistent host memory buffer and the persistent storage media device prior to power down;

attempt to verify the saved signatures on power restoration; and

prevent a power up of the persistent storage media device if the signatures cannot be verified on the power restoration.

3. The apparatus of claim 1 , wherein the memory controller is to identify whether or not the persistent storage media device and the persistent host memory buffer are expected to remain permanently connected.

4. A method of controlling memory, comprising:

persistently storing data in a persistent host memory buffer;

controlling communication between the persistent host memory buffer and a persistent storage media device;

pairing the persistent host memory buffer with the persistent storage media device with a soft binding in response to an identification that the persistent storage media device and the persistent host memory buffer are not expected to be permanently connected to each other, and a permanent binding in response to an identification that the persistent storage media device and the persistent host memory buffer are expected to remain permanently connected to each other;

extending the persistent storage media device with the persistent host memory buffer by utilizing the persistent host memory buffer as a write-back cache for the persistent storage media device only when the permanent binding is used to pair the persistent host memory buffer with the persistent storage media device; and

utilizing the persistent host memory buffer as a write-through cache for the persistent storage media device when the soft binding is used to pair the persistent host memory buffer with the persistent storage media device.

5. The method of claim 4 , further comprising:

saving a signature in the persistent host memory buffer and the persistent storage media device prior to power down;

attempting a verification of the saved signatures on power restoration; and

preventing a power up of the persistent storage media device if the signatures cannot be verified on the power restoration.

6. The method of claim 4 , further comprising identifying whether or not the persistent storage media device and the persistent host memory buffer are expected to remain permanently connected.

7. At least one non-transitory computer readable storage medium, comprising a set of instructions, which when executed by a computing device, cause the computing device to:

persistently store data in a persistent host memory buffer;

control communication between the persistent host memory buffer and a persistent storage media device;

pair the persistent host memory buffer with the persistent storage media device with a soft binding in response to an identification that the persistent storage media device and the persistent host memory buffer are not expected to be permanently connected to each other, and a permanent binding in response to an identification that the persistent storage media device and the persistent host memory buffer are expected to remain permanently connected to each other;

extend the persistent storage media device with the persistent host memory buffer by a utilization of the persistent host memory buffer as a write-back cache for the persistent storage media device only when the permanent binding is used to pair the persistent host memory buffer with the persistent storage media device; and

utilize the persistent host memory buffer as a write-through cache for the persistent storage media device when the soft binding is used to pair the persistent host memory buffer with the persistent storage media device.

8. The at least one non-transitory computer readable storage medium of claim 7 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to:

save a signature in the persistent host memory buffer and the persistent storage media device prior to power down;

attempt a verification of the saved signatures on power restoration; and

prevent a power up of the persistent storage media device if the signatures cannot be verified on the power restoration.

9. The at least one non-transitory computer readable storage medium of claim 7 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to identify whether or not the persistent storage media device and the persistent host memory buffer are expected to remain permanently connected.

10. A memory controller communicatively coupled to a processor, a solid state drive, and a persistent host memory buffer to control communication between the solid state drive and the persistent host memory buffer, wherein the memory controller is to:

pair the persistent host memory buffer with the solid state drive with a soft binding in response to an identification that the solid state drive and the persistent host memory buffer are not expected to be permanently connected to each other, and a permanent binding in response to an identification that the solid state drive and the persistent host memory buffer are expected to remain permanently connected to each other;

extend the solid state drive with the persistent host memory buffer by a utilization of the persistent host memory buffer as a write-back cache for the solid state drive only when the permanent binding is used to pair the persistent host memory buffer with the solid state drive; and

utilize the persistent host memory buffer as a write-through cache for the solid state drive when the soft binding is used to pair the persistent host memory buffer with the solid state drive.

11. The memory controller of claim 10 , wherein the memory controller is further to identify whether or not the solid state drive and the persistent host memory buffer are expected to remain permanently connected.

12. The memory controller of claim 10 , wherein the memory controller is further to:

save a signature in the persistent host memory buffer and the solid state drive prior to power down;

attempt to verify the saved signatures on power restoration; and

prevent a power up of the solid state drive if the signatures cannot be verified on the power restoration.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072792/0592 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2019
From: BOYD, JAMES A.; CARROLL, JOHN W.; TRIKA, SANJEEV N.
To: INTEL CORPORATION
Reel/Frame 050706/0561 →
Continuity (1)
Related Publication 20190004940A1 · Jan 3, 2019