Apparatuses and methods for mixed charge pumps with voltage regulator circuits
View Patent ↗Apparatuses and methods for mixed charge pumps with voltage regulator circuits is disclosed. An example apparatus comprises a first charge pump circuit configured to provide a first output, a second charge pump circuit configured to provide a second output, a plurality of coupling circuits configured to voltage couple and current couple the first output and the second output to a common node to provide a regulated voltage, and a feedback circuit configured to regulate the first output and the second output based on the regulated voltage.
1. An apparatus comprising:
a first charge pump circuit configured to provide a first output;
a second charge pump circuit configured to provide a second output;
a plurality of coupling circuits configured to voltage couple and current couple the first output and the second output to a common node to provide a regulated voltage; and
a feedback circuit configured to regulate the first output and the second output based on the regulated voltage.
2. The apparatus of claim 1 , wherein the plurality of coupling circuits comprises:
a first voltage coupler circuit configured to voltage couple the first output to the common node;
a second voltage coupler circuit configured to voltage couple the second output to the common node;
a first current coupler circuit configured to current couple the first output to the common node; and
a second current coupler circuit configured to current couple the second output to the common node.
3. The apparatus of claim 2 , wherein the first voltage coupler circuit comprises:
a first resistance coupled to the first output;
a first NFET and a second NFET coupled in series to the first resistance; and
a second resistance coupled to the second NFET and the common node.
4. The apparatus of claim 3 , wherein a gate of the first NFET and a gate of the second NFET are coupled to the first resistance.
5. The apparatus of claim 2 , wherein the second voltage coupler circuit comprises:
a first NFET diode coupled to the second output, wherein the first NFET is further coupled to the common node.
6. The apparatus of claim 2 , wherein the first current coupler circuit comprises a first NFET and a second NFET coupled in series between the first output and the common node.
7. The apparatus of claim 2 , wherein the second current coupler circuit comprises a first NFET and a second NFET coupled in series between the second output and the common node.
8. An apparatus comprising:
a first charge pump circuit configured to provide a first output;
a second charge pump circuit configured to provide a second output;
a plurality of coupling circuits configured to voltage couple and current couple the first output and the second output to a common node to provide a regulated voltage, the plurality of coupling circuits comprises:
a first current coupler circuit comprising a first NFET and a second NFET coupled in series between the first output and the common node, and
a second current coupler circuit comprising a third NFET and a fourth NFET coupled in series between the second output and the common node; and
a feedback circuit configured to regulate the first output and the second output based on the regulated voltage.
9. The apparatus of claim 8 , wherein the plurality of coupling circuits further comprises:
a first voltage coupler circuit configured to voltage couple the first output to the common node; and
a second voltage coupler circuit configured to voltage couple the second output to the common node.
10. The apparatus of claim 8 , wherein the first current coupler circuit is configured to current couple the first output to the common node.
11. The apparatus of claim 8 , wherein the second current coupler circuit is configured to current couple the second output to the common node.
12. The apparatus of claim 9 , wherein the first voltage coupler circuit comprises:
a first resistance coupled to the first output;
a first NFET and a second NFET coupled in series to the first resistance; and
a second resistance coupled to the second NFET and the common node.
13. The apparatus of claim 12 , wherein a gate of the first NFET and a gate of the second NFET are coupled to the first resistance.
14. The apparatus of claim 9 , wherein the second voltage coupler circuit comprises a first NFET diode coupled to the second output, the first NFET diode is further coupled to the common node.