IP Library › Granted Patent US 10,262,736

Granted Patent B2

US 10,262,736 · App. 15/641,691 · Granted Apr 16, 2019

Multifunctional memory cells

Inventor: Arup Bhattacharyya (Essex Junction, VT)

Assignee: Micron Technology, Inc.

G11C14/0018 H01L27/10805 H01L27/11568 H01L28/40 H01L29/2003 H01L29/513 H01L29/517 H01L29/518 G11C16/0466 H01L29/4966

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Quick Facts

Patent No.: US 10,262,736
App. No.: 15/641,691
Granted: Apr 16, 2019
Kind: B2

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Abstract

The present disclosure includes multifunctional memory cells. A number of embodiments include a charge transport element having an oxygen-rich silicon oxynitride material, a volatile charge storage element configured to store a first charge transported through the charge transport element, and a non-volatile charge storage element configured to store a second charge transported through the charge transport element, wherein the non-volatile charge storage element includes a gallium nitride material.

Claims (75)

1. A memory cell, comprising:

a charge transport element having an oxygen-rich silicon oxynitride material;

a volatile charge storage element configured to store a first charge transported through the charge transport element; and

a non-volatile charge storage element configured to store a second charge transported through the charge transport element, wherein the non-volatile charge storage element includes a gallium nitride material; and

an additional volatile charge storage element configured to store a third charge transported through the charge storage element.

2. The memory cell of claim 1 , wherein the non-volatile charge storage element includes a silicon-rich nitride material.

3. The memory cell of claim 1 , wherein the memory cell includes a charge blocking element configured to prevent leakage of the first charge stored by the volatile charge storage element and leakage of the second charge stored by the non-volatile storage element.

4. The memory cell of claim 3 , wherein the charge blocking element includes an oxynitride material.

5. The memory cell of claim 3 , wherein the charge blocking element includes an aluminum oxide material.

6. The memory cell of claim 1 , wherein the memory cell includes a lanthanum oxide material between the volatile charge storage element and the additional volatile charge storage element.

7. The memory cell of claim 1 , wherein the charge transport element includes a hafnium dioxide material.

8. The memory cell of claim 1 , wherein the volatile charge storage element includes a nitride material.

9. The memory cell of claim 8 , wherein the nitride material is a silicon nitride material.

10. The memory cell of claim 8 , wherein the nitride material is a silicon oxynitride material.

11. The memory cell of claim 1 , wherein the charge transport element includes an additional oxynitride material.

12. The memory cell of claim 11 , wherein the charge transport element includes:

a first oxygen-rich silicon oxynitride material; and

a second oxygen-rich silicon oxynitride material;

wherein the additional oxynitride material is between the first oxygen-rich silicon oxynitride material and the second oxygen-rich silicon oxynitride material.

13. The memory cell of claim 1 , wherein:

the charge transport element includes a lanthanum oxide material; and

the memory cell includes an additional lanthanum oxide material between the volatile charge storage element and the non-volatile charge storage element.

14. A memory cell, comprising:

a charge transport element having a hafnium dioxide material;

a volatile charge storage element configured to store a first charge transported through the charge transport element; and

an additional non-volatile charge storage element configured to store a third charge transported through the charge transport element.

15. The memory cell of claim 14 , wherein the charge transport element includes a lanthanum aluminate material.

16. The memory cell of claim 14 , wherein the charge transport element includes a lanthanum oxide material.

17. The memory cell of claim 14 , wherein the memory cell includes a charge blocking element having a lanthanum oxide material configured to prevent leakage of the first charge stored by the volatile charge storage element and leakage of the second charge stored by the non-volatile storage element.

18. The memory cell of claim 14 , wherein the charge transport element is a crested tunnel barrier.

19. The memory cell of claim 14 , wherein the charge transport element includes:

a first hafnium dioxide material;

a second hafnium dioxide material; and

an aluminum oxide material between the first hafnium dioxide material and the second hafnium dioxide material.

20. The memory cell of claim 14 , wherein the memory cell includes an oxynitride material between the volatile charge storage element and the non-volatile charge storage element.

21. The memory cell of claim 14 , wherein:

the volatile charge storage element is a dynamic random access memory (DRAM) storage element; and

the non-volatile charge storage element is an NROM memory storage element.

22. An apparatus, comprising:

an array of memory cells, wherein each respective memory cell of the array includes:

a charge transport element having an oxygen-rich silicon oxynitride material;

a volatile charge storage element configured to store a first charge transported through the charge transport element; and

an additional volatile charge storage element configured to store a third charge transported through the charge transport element, wherein the additional volatile charge storage element includes a silicon-rich nitride material; and

an additional non-volatile charge storage element configured to store a fourth charge transported through the charge transport element, wherein the additional non-volatile charge storage element includes a silicon-rich nitride material.

23. The apparatus of claim 22 , wherein the charge transport element of each respective memory cell of the array is a progressive band offset tunnel barrier.

24. The apparatus of claim 22 , wherein the charge transport element of each respective memory cell of the array is a variable oxide thickness tunnel barrier.

25. The apparatus of claim 22 , wherein each respective memory cell of the array is a multilevel memory cell.

26. The apparatus of claim 22 , wherein each respective memory cell of the array is a vertically stacked planar memory cell.

27. The apparatus of claim 22 , wherein the charge transport element of each respective memory cell of the array includes:

a first hafnium dioxide material;

a second hafnium dioxide material; and

the oxygen-rich silicon oxynitride material is between the first hafnium dioxide material and the second hafnium dioxide material.

28. The apparatus of claim 22 , wherein the non-volatile storage element of each respective memory cell of the array includes:

an additional silicon-rich nitride material; and

a hafnium dioxide material between the silicon-rich nitride material and the additional silicon-rich nitride material.

29. The apparatus of claim 22 , wherein the charge transport element of each respective memory cell of the array includes a silicon-rich nitride material.

30. A method of operating a memory cell, comprising:

transporting a charge through a hafnium oxynitride material of the memory cell to at least one of:

a volatile charge storage element of the memory cell;

a non-volatile charge storage element of the memory cell having a silicon-rich nitride material; and

an additional non-volatile charge storage element of the memory cell having a silicon oxynitride material; and

storing, by the charge storage element to which the charge is transported, the charge.

31. The method of claim 30 , wherein the method includes transporting the charge through an additional nitride material of the memory cell to at least one of:

the volatile charge storage element of the memory cell; and

the non-volatile charge storage element of the memory cell.

32. The method of claim 30 , wherein the hafnium oxynitride material is a hafnium silicon oxynitride material.

33. The method of claim 30 , wherein the hafnium oxynitride material is a hafnium lanthanum oxynitride material.

34. A method of operating a memory cell, comprising:

transporting a charge through a hafnium oxynitride material of the memory cell to at least one of:

a volatile charge storage element of the memory cell;

a non-volatile charge storage element of the memory cell having a silicon-rich nitride material; and

an additional non-volatile charge storage element of the memory having a hafnium dioxide material; and

storing, by the charge storage element to which the charge is transported, the charge.

Assignments (7)

RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019