IP Library › Granted Patent US 10,332,841
Granted Patent B2
US 10,332,841 · App. 15/650,495 · Granted Jun 25, 2019

System on integrated chips and methods of forming the same

Inventors: Chen-Hua Yu (Hsinchu, TW); Chuei-Tang Wang (Taichung, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/5389H01L21/486H01L21/4857H01L23/3114H01L23/49816H01L23/5226H01L23/5383H01L23/5384H01L23/5386H01L25/065H01L25/50H01L23/3128H01L2224/18
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Quick Facts
Patent No.
US 10,332,841
App. No.
15/650,495
Granted
Jun 25, 2019
Kind
B2
Abstract

A semiconductor device and methods of forming are provided. The method includes bonding a second die to a surface of a first die. The method includes encapsulating the second die in an isolation material, and forming a through via extending through the isolation material. The method also includes forming a first passive device in the isolation material.

Claims (49)

1. A method, comprising:

bonding a second die to a surface of a first die;

encapsulating the second die in an isolation material;

forming a through via extending through the isolation material; and

forming a first passive device in the isolation material, the first passive device overlying the first die and extending along a sidewall of the second die.

2. The method according to claim 1 , wherein the first passive device is electrically connected to a conductive feature of the first die.

3. The method according to claim 1 , wherein bonding the second die to the surface of the first die comprises hybrid bonding the second die to the surface of the first die.

4. The method according to claim 1 , further comprising performing a planarization process on the second die after encapsulating the second die in the isolation material.

5. The method according to claim 4 , wherein the planarization process exposes a through die via in the second die.

6. The method according to claim 1 , further comprising:

bonding a third die to the first die; and

encapsulating the third die in the isolation material.

7. The method according to claim 1 , wherein the first die comprises an interconnect structure over a substrate, and wherein the first passive device is electrically connected to a conductive line in the interconnect structure.

8. The method according to claim 1 , wherein the through via and the first passive device are simultaneously formed.

9. The method according to claim 8 , wherein simultaneously forming the first passive device and the through via comprises:

forming a plurality of openings in the isolation material; and

performing an electroplating process to deposit a conductive material in the plurality of openings; and

performing a planarization process, wherein after the planarization process the first passive device and the through via are formed.

10. The method according to claim 1 , wherein forming the through via and forming the first passive device comprises:

performing a first etch to form a first opening;

performing a second etch to form a second opening, wherein the second etch is performed after the first etch has been completed; and

performing an electroplating process to form the through via in the first opening and the first passive device in the second opening, or performing an electroplating process to form the first passive device in the first opening and the through via in the second opening.

11. The method according to claim 1 , wherein the first passive device comprises an inductor, an antenna, a power combiner, a coupler, or a balun.

12. The method according to claim 1 , further comprising:

forming a second passive device; and

encapsulating the second passive device in the isolation material;

wherein the first passive device and the second passive device are simultaneously formed.

13. A method, comprising:

aligning contacts of a second die to first contacts of a first die;

aligning contacts of a third die to second contacts of the first die;

bonding the second die to the first die using the first contacts of the first die;

bonding the third die to the first die using the second contacts of the first die;

encapsulating the second die and the third die in a dielectric material;

forming a first opening and a second opening in the dielectric material; and

filling the first opening and the second opening with a conductive material to form a through via in the first opening and a first passive device in the second opening.

14. The method according to claim 13 , wherein the first opening and the second opening are simultaneously formed.

15. The method according to claim 13 , wherein the first opening and the second opening are sequentially formed.

16. The method according to claim 13 , further comprising:

forming a third opening in the dielectric material; and

filling the third opening with the conductive material to form a second passive device in the third opening.

17. The method according to claim 16 , wherein the first opening, the second opening, and the third opening are simultaneously formed.

18. The method according to claim 16 , wherein the first passive device and the second passive device are selected from the group consisting of: an inductor, an antenna, a power combiner, a coupler, and a balun.

19. A method, comprising:

bonding a first surface of a first die to a second die;

bonding the first surface of the first die to a third die;

forming an isolation material along sidewalls of the third die and sidewalls of the second die, wherein a sidewall of the isolation material is aligned with a sidewall of the first die;

forming a first opening and a second opening in the isolation material, wherein a first contact of the first die is exposed by the first opening and a second contact of the first die is exposed by the second opening; and

simultaneously filling the first opening and the second opening with a conductive material to form a first passive device in the first opening and a second passive device in the second opening, the first passive device being electrically connected to the first contact and the second passivation device being electrically connected to the second contact.

20. The method according to claim 19 , further comprising forming a through via extending through the isolation material between a first surface of the isolation material and the first surface of the first die, wherein the first surface of the isolation material is level with a surface of the second die that is farthest from the first die.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2017
From: YU, CHEN-HUA; WANG, CHUEI-TANG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 043571/0462 →
Continuity (2)
Provisional Application 62364546 · Jul 20, 2016
Related Publication 20190019756A1 · Jan 17, 2019