Granted Patent B2

US 10,586,495 · App. 15/651,192 · Granted Mar 10, 2020

Inventors: Hidetomo Kobayashi (Isehara, JP); Kouhei Toyotaka (Atsugi, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

G09G3/3266G09G3/3426G09G3/3648G09G2300/023G09G2300/046G09G2300/0426G09G2300/0439G09G2300/0456G09G2300/0809G09G2310/0286

Abstract

Claims (58)

1. A display device comprising:

a driver circuit comprising a plurality of pulse output circuits, each of the plurality of pulse output circuits comprising a first transistor; and

a pixel circuit comprising a second transistor and a third transistor,

wherein each of the plurality of pulse output circuits is configured to drive a gate line,

wherein the pixel circuit is electrically connected to the gate line,

wherein a second layer comprising the second transistor is stacked over a first layer comprising the first transistor and the third transistor,

wherein the first transistor and the second transistor overlap with each other,

wherein the second transistor is electrically connected to the first transistor through a conductive layer provided in an opening of an insulating layer,

wherein the insulating layer is sandwiched between the first transistor and the second transistor,

wherein a gate electrode of the second transistor and a gate electrode of the third transistor are directly connected to the gate line, and

wherein one of a source and a drain of the third transistor in the first layer is electrically connected to the second transistor in the second layer.

2. The display device according to claim 1 , wherein the first transistor and the second transistor have the same polarity.

3. An electronic device comprising the display device according to claim 1 .

4. The display device according to claim 1 ,

wherein the first transistor comprises a semiconductor layer, and

wherein a top surface of the semiconductor layer is in contact with the insulating layer.

5. A display device comprising:

a driver circuit comprising a plurality of pulse output circuits, each of the plurality of pulse output circuits comprising a first transistor;

a pixel circuit comprising a second transistor and a third transistor; and

a display element electrically connected to the pixel circuit,

wherein each of the plurality of pulse output circuits is configured to drive a gate line,

wherein the pixel circuit is electrically connected to the gate line,

wherein a second layer comprising the second transistor is stacked over a first layer comprising the first transistor and the third transistor,

wherein the first transistor and the second transistor overlap with each other,

wherein the second transistor is electrically connected to the first transistor through a conductive layer provided in an opening of an insulating layer,

wherein the insulating layer is sandwiched between the first transistor and the second transistor,

wherein a third layer comprising the display element is stacked over the second layer,

wherein one of a source and a drain of the third transistor in the first layer is electrically connected to the second transistor in the second layer and the display element in the third layer,

wherein a gate electrode of the second transistor and a gate electrode of the third transistor are directly connected to the gate line, and

wherein the other of the source and the drain of the third transistor in the first layer is electrically connected to a monitor line in the first layer.

6. The display device according to claim 5 , wherein the first transistor and the second transistor have the same polarity.

7. The display device according to claim 5 , wherein the display element comprises a light-emitting element.

8. An electronic device comprising the display device according to claim 5 .

9. The display device according to claim 5 ,

wherein the first transistor comprises a semiconductor layer, and

wherein a top surface of the semiconductor layer is in contact with the insulating layer.

10. A display device comprising:

a driver circuit comprising a plurality of pulse output circuits, each of the plurality of pulse output circuits comprising a first transistor;

a pixel circuit comprising a second transistor and a third transistor; and

a display element electrically connected to the pixel circuit,

wherein each of the plurality of pulse output circuits is configured to drive a gate line,

wherein the pixel circuit is electrically connected to the gate line,

wherein a second layer comprising the second transistor is stacked over a first layer comprising the first transistor and the third transistor,

wherein the first transistor and the second transistor overlap with each other,

wherein the second transistor is electrically connected to the first transistor through a conductive layer provided in an opening of an insulating layer,

wherein the insulating layer is sandwiched between the first transistor and the second transistor,

wherein a third layer comprising the display element is stacked over the second layer,

wherein one of a source and a drain of the third transistor in the first layer is electrically connected to the second transistor in the second layer and the display element in the third layer,

wherein the other of the source and the drain of the third transistor in the first layer is electrically connected to a monitor line in the first layer,

wherein a gate electrode of the second transistor and a gate electrode of the third transistor are directly connected to the gate line, and

wherein a channel formation region of each of the first transistor and the second transistor comprises a metal oxide.

11. The display device according to claim 10 , wherein the first transistor and the second transistor have the same polarity.

12. An electronic device comprising the display device according to claim 10 .

13. The display device according to claim 10 ,

wherein the first transistor comprises a semiconductor layer, and

wherein a top surface of the semiconductor layer is in contact with the insulating layer.

14. The display device according to claim 10 , wherein the metal oxide comprises indium and zinc.

15. The display device according to claim 10 , wherein the display element comprises a light-emitting element.

Assignments (1)

Priority Claims (1)

Continuity (1)

Cited By (11)

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