IP Library › Granted Patent US 12,336,398
Granted Patent B2
US 12,336,398 · App. 17/628,381 · Granted Jun 17, 2025

Display device with a driver circuit comprising a plurality of pulse output circuits

Inventors: Hidetomo Kobayashi (Isehara, JP); Takayuki Ikeda (Atsugi, JP); Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H10K59/131H10K59/1213H10K59/1216
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Quick Facts
Patent No.
US 12,336,398
App. No.
17/628,381
Granted
Jun 17, 2025
Kind
B2
Abstract

A display device with high design flexibility that can be designed easily is provided. One embodiment of the present invention includes a first substrate ( 101 ) provided with a driver circuit including first and second pulse output circuits ( 91 _ 1, 91 _ 2 ), a second substrate ( 103 ) provided with a display unit ( 92 ) including a first pixel circuit including a first source wiring (SL_ 1 ) and a first contact portion (SC_ 1 ) and a second pixel circuit including a second source wiring (SL_ 2 ) adjacent to the first source wiring and a second contact portion (SC_ 2 ) electrically connected to the second source wiring, and a connection unit where the first and second substrates are electrically connected to each other. The display unit is placed to overlap with the driver circuit, the first and second pulse output circuits are electrically connected to the first and second pixel circuits respectively through the first and second contact portions, the first pulse output circuit is placed on an opposite side of a straight line connecting the first and second contact portions from the second pulse output circuit, and the connection unit includes a wiring containing copper.

Claims (38)

1. A display device comprising:

a first silicon substrate provided with a driver circuit comprising a first pulse output circuit, a second pulse output circuit, a third pulse output circuit, and a fourth pulse output circuit;

a second silicon substrate provided with a display unit comprising a first pixel circuit comprising a first source line and a first contact portion electrically connected to the first source line, a second pixel circuit comprising a second source line adjacent to the first source line and a second contact portion electrically connected to the second source line, a third pixel circuit comprising a third source line adjacent to the second source line and a third contact portion electrically connected to the third source line, and a fourth pixel circuit comprising a fourth source line adjacent to the third source line and a fourth contact portion electrically connected to the fourth source line; and

a connection unit where the first silicon substrate and the second silicon substrate are electrically connected to each other,

wherein the display unit is placed to overlap with the driver circuit,

wherein the first pulse output circuit is electrically connected to the first pixel circuit through the first contact portion,

wherein the second pulse output circuit is electrically connected to the second pixel circuit through the second contact portion,

wherein the third pulse output circuit is electrically connected to the third pixel circuit through the third contact portion,

wherein the fourth pulse output circuit is electrically connected to the fourth pixel circuit through the fourth contact portion,

wherein the first pulse output, circuit and the second pulse output, circuit are placed on different sides with respect to a straight line through the first contact portion and the second contact portion,

wherein the second pulse output circuit and the third pulse output circuit are placed on different sides with respect to the straight line,

wherein the third pulse output circuit and the fourth pulse output circuit are placed on different sides with respect to the straight line, and

wherein the connection unit comprises a wiring comprising copper.

2. A display device comprising:

a first silicon substrate provided with a driver circuit comprising a first pulse output circuit, a second pulse output circuit, a third pulse output circuit, and a fourth pulse output circuit;

a second silicon substrate provided with a display unit comprising a first pixel circuit comprising a first source line and a first contact portion electrically connected to the first source line, a second pixel circuit comprising a second source line adjacent to the first source line and a second contact portion electrically connected to the second source line, a third pixel circuit comprising a third source line adjacent to the second source line and a third contact portion electrically connected to the third source line, and a fourth pixel circuit comprising a fourth source line adjacent to the third source line and a fourth contact portion electrically connected to the fourth source line; and

a connection unit where the first silicon substrate and the second silicon substrate are electrically connected to each other,

wherein the display unit is placed to overlap with the driver circuit,

wherein the first pulse output circuit is electrically connected to the first pixel circuit through the first contact portion,

wherein the second pulse output circuit is electrically connected to the second pixel circuit through the second contact portion,

wherein the third pulse output circuit is electrically connected to the third pixel circuit through the third contact portion,

wherein the fourth pulse output circuit is electrically connected to the fourth pixel circuit through the fourth contact portion,

wherein the first pulse output, circuit and the second pulse output, circuit are placed on different sides with respect to a straight line through the first contact portion and the second contact portion,

wherein the second pulse output circuit and the third pulse output circuit are placed on different sides with respect to the straight line,

wherein the third pulse output circuit and the fourth pulse output circuit are placed on different sides with respect to the straight line, and

wherein the connection unit comprises a conductive bump.

3. The display device according to claim 1 ,

wherein the first pixel circuit comprises a first display element, and

wherein the first display element is configured to emit visible light or to transmit visible light.

4. The display device according to claim 3 ,

wherein the first pixel circuit further comprises a second display element, and

wherein the second display element is configured to reflect visible light.

5. The display device according to claim 2 ,

wherein the first pixel circuit comprises a first display element, and

wherein the first display element is configured to emit visible light or to transmit visible light.

6. The display device according to claim 5 ,

wherein the first pixel circuit further comprises a second display element, and

wherein the second display element is configured to reflect visible light.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2022
From: KOBAYASHI, HIDETOMO; IKEDA, TAKAYUKI; YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 058695/0545 →
Priority Claims (1)
JP 2019-142922 · Aug 2, 2019 · national
Continuity (1)
Related Publication 20220278187A1 · Sep 1, 2022
References Cited (31)
US 7067926B2 · Yamazaki et al. · 2006 [cited by applicant]
US 7511380B2 · Yamazaki et al. · 2009 [cited by applicant]
US 9760102B2 · Tanaka et al. · 2017 [cited by applicant]
US 9798339B2 · Tanaka et al. · 2017 [cited by applicant]
US 10365674B2 · Tanaka et al. · 2019 [cited by applicant]
US 10586495B2 · Kobayashi et al. · 2020 [cited by applicant]
US 10901442B2 · Tanaka et al. · 2021 [cited by applicant]
US 11205387B2 · Kobayashi et al. · 2021 [cited by applicant]
US 20040140547A1 · Yamazaki et al. · 2004 [cited by applicant]
US 20050116616A1 · Koeda · 2005 [cited by applicant]
US 20170352689A1 · Chung · 2017 [cited by applicant]
US 20180026218A1 · Kobayashi · 2018 [cited by examiner]
US 20180122298A1 · Lee et al. · 2018 [cited by applicant]
US 20180211596A1 · Gu · 2018 [cited by examiner]
US 20190180696A1 · Park · 2019 [cited by examiner]
US 20210103307A1 · Tanaka et al. · 2021 [cited by applicant]
US 20210383762A1 · Kobayashi et al. · 2021 [cited by applicant]
CN 001519929A · 2004 [cited by applicant]
CN 001615057A · 2005 [cited by applicant]
EP 1432032A · 2004 [cited by applicant]
JP 2004200522A · 2004 [cited by applicant]
JP 2005142054A · 2005 [cited by applicant]
JP 2018022143A · 2018 [cited by applicant]
JP 7532376 · 2024 [cited by applicant]
KR 20050044264A · 2005 [cited by applicant]
KR 101158831 · 2012 [cited by applicant]
TW 200417033 · 2004 [cited by applicant]
WO WO2014069529 · 2014 [cited by applicant]
WO WO2017193316 · 2017 [cited by applicant]
International Search Report (Application No. PCT/IB2020/056818), dated Sep. 24, 2020. [cited by applicant]
Written Opinion (Application No. PCT/IB2020/056818), dated Sep. 24, 2020. [cited by applicant]