Forming on-chip metal-insulator-semiconductor capacitor with pillars
A method is presented for forming a semiconductor structure. The method includes forming a plurality of fins on a first region of the semiconductor substrate, forming a bi-polymer structure, selectively removing the first polymer of the bi-polymer structure and forming deep trenches in the semiconductor substrate resulting in pillars in a second region of the semiconductor structure. The method further includes selectively removing the second polymer of the bi-polymer structure, doping the pillars, and depositing a high-k metal gate (HKMG) over the first and second regions to form the MIS capacitor in the second region of the semiconductor substrate.
1. A method for forming a metal-insulator-semiconductor (MIS) capacitor over a semiconductor substrate, the method comprising:
forming a plurality of fins;
depositing a polymer between the plurality of fins;
forming pillars by selectively removing the polymer and recessing the semiconductor substrate;
depositing a dielectric between the pillars such that a top surface of the pillars is exposed;
forming a first spacer over the pillars; and
applying a first mask over the plurality of fins to etch the first spacer formed over the pillars.
2. The method of claim 1 , wherein the plurality of fins are formed over a first region of the semiconductor substrate.
3. The method of claim 1 , wherein the pillars are formed over a second region of the semiconductor structure.
4. The method of claim 1 , wherein the polymer includes a bi-polymer structure.
5. The method of claim 4 , further comprising depositing a directed self-assembly (DSA) co-polymer to form the bi-polymer structure by anneal.
6. The method of claim 1 , wherein the pillars are doped after the first mask is applied over the plurality of fins.
7. The method of claim 6 , wherein a high-k metal gate (HKMG) is deposited over the doped pillars to form the MIS capacitor.
8. The method of claim 7 , wherein the first mask is stripped after doping the pillars and before depositing the HKMG over the doped pillars.
9. The method of claim 8 , wherein a second mask is applied and a portion of the HKMG is etched to form a recess between the plurality of fins and the pillars.
10. The method of claim 9 , wherein the second mask is stripped and the recess is filled with an oxide.
11. The method of claim 10 , wherein the HKMG is recessed to expose a top portion of the plurality of fins.
12. The method of claim 11 , wherein a second spacer is formed over exposed regions of the HKMG and between the plurality of fins.
13. The method of claim 12 , wherein epitaxial growth is performed over the exposed top portions of the plurality of fins.
14. A method for forming a metal-insulator-semiconductor (MIS) capacitor over a semiconductor substrate, the method comprising:
forming a plurality of fins;
depositing a polymer between the plurality of fins;
forming pillars by selectively removing the polymer and recessing the semiconductor substrate;
depositing a dielectric between the pillars such that a top surface of the pillars is exposed;
forming a first spacer over the pillars and between the plurality of fins;
applying a first mask over the plurality of fins;
etching the first spacer formed over the pillars;
etching the dielectric deposited between the pillars; and
doping the pillars.
15. The method of claim 14 , wherein the polymer includes a bi-polymer structure.
16. The method of claim 14 , wherein a high-k metal gate (HKMG) is deposited over the doped pillars to form the MIS capacitor.
17. The method of claim 16 , wherein the first mask is stripped after doping the pillars and before depositing the HKMG over the doped pillars.
18. The method of claim 17 , wherein a second mask is applied and a portion of the HKMG is etched to form a recess between the plurality of fins and the pillars.
19. The method of claim 18 , wherein the second mask is stripped, the recess is filled with an oxide, and the HKMG is recessed to expose a top portion of the plurality of fins.
20. The method of claim 19 ,
wherein a second spacer is formed over exposed regions of the HKMG and between the plurality of fins; and
wherein epitaxial growth is performed over the exposed top portions of the plurality of fins.