IP Library Granted Patent US 10,418,355
Granted Patent B2
US 10,418,355 · App. 15/671,772 · Granted Sep 17, 2019

Optoelectronic semiconductor chip and method for fabrication thereof

Inventors: Rainer Butendeich (Regensburg, DE); Alexander Walter (Laaber, DE); Matthias Peter (Regensburg, DE); Tobias Meyer (Regensburg, DE); Tetsuya Taki (Tokyo, JP); Hubert Maiwald (Neutraubling, DE)
Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
H01L27/0248H01L27/15H01L31/02363H01L31/03044H01L31/035236H01L33/02H01L33/06H01L33/08H01L33/32H01L33/24H01L2924/0002
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Quick Facts
Patent No.
US 10,418,355
App. No.
15/671,772
Granted
Sep 17, 2019
Kind
B2
Abstract

An optoelectronic semiconductor chip is disclosed. In an embodiment the optoelectronic semiconductor chip includes a first semiconductor layer sequence having a plurality of microdiodes, and a second semiconductor layer sequence having an active region. The first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material, the first semiconductor layer sequence is before the first semiconductor layer sequence in the direction of growth, and the microdiodes form an ESD protection for the active region.

Claims (58)

1. An optoelectronic semiconductor chip comprising:

a first semiconductor layer sequence comprising a multiplicity of microdiodes; and

a second semiconductor layer sequence comprising an active region,

wherein the first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material,

wherein the first semiconductor layer sequence is placed in front of the second semiconductor layer sequence in a growth direction,

wherein the microdiodes form an electrostatic discharge ESD protection for the active region,

wherein at least one microdiode of the microdiodes comprises a pn junction,

wherein the active region comprises at least one pn junction,

wherein the pn junction of the least one microdiode and the pn junction of the active region are biased in the same direction,

wherein the pn junction of the least one microdiode has a higher threshold voltage in a forward direction than the pn junction of the active region, and

wherein the at least one microdiode has a nonlinear current-voltage characteristic.

2. The optoelectronic semiconductor chip according to claim 1 , wherein the microdiodes are respectively formed by V-pits, and wherein a majority of the V-pits have similar dimensions and a majority of the microdiodes have electrical properties of the same type.

3. The optoelectronic semiconductor chip according to claim 1 , wherein the pn junction of the microdiode have a lower breakdown voltage in a reverse direction than the pn junction of the active region.

4. The optoelectronic semiconductor chip according to claim 1 , wherein a density of the microdiodes is at least 5*10 7 /cm 2 .

5. The optoelectronic semiconductor chip according to claim 1 , wherein at least 75% of the microdiodes are arranged inside an ESD layer, which has a thickness of at least half and at most three times the thickness of the active region.

6. The optoelectronic semiconductor chip according to claim 1 , wherein an ESD voltage pulse flows away through at least 50% of the microdiodes in a reverse direction of the microdiodes.

7. The optoelectronic semiconductor chip according to claim 1 , wherein at least 75% of the microdiodes are respectively arranged in the region of a threading dislocation.

8. The optoelectronic semiconductor chip according to claim 1 , wherein the second semiconductor layer sequence follows on directly from the first semiconductor layer sequence.

9. The optoelectronic semiconductor chip according to claim 1 , wherein the optoelectronic semiconductor chip emits blue and/or green light during operation.

10. An optoelectronic semiconductor chip comprising:

a first semiconductor layer sequence comprising a plurality of V-pits; and

a second semiconductor layer sequence comprising an active region,

wherein the first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material,

wherein the first semiconductor layer sequence is placed in front of the second semiconductor layer sequence in a growth direction,

wherein the V-pits form microdiodes,

wherein the microdiodes form an electrostatic discharge ESD protection for the active region,

wherein a majority of the microdiodes have electrical properties of the same type,

wherein each V-pit forms a part of a microdiode,

wherein the V-pits are arranged in the first semiconductor layer sequence, and

wherein the microdiodes extend from the first semiconductor layer sequence through the active region into the second semiconductor layer sequence, and

wherein the at least one microdiode has a nonlinear current-voltage characteristic.

11. The optoelectronic semiconductor chip according to claim 10 ,

wherein at least one of the microdiodes comprises a pn junction,

wherein the active region comprises at least one pn junction,

wherein the pn junction of the microdiode and the pn junction of the active region are biased in the same direction, and

wherein the pn junction of the microdiode has a lower breakdown voltage in a reverse direction than the pn junction of the active region.

12. The optoelectronic semiconductor chip according to claim 10 ,

wherein at least one of the microdiodes comprises a pn junction,

wherein the active region comprises at least one pn junction,

wherein the pn junction of the microdiode and the pn junction of the active region are biased in the same direction, and

wherein the pn junction of the microdiode has a higher threshold voltage in a forward direction than the pn junction of the active region.

13. The optoelectronic semiconductor chip according to claim 10 , wherein a density of the microdiodes is at least 5*10 7 /cm 2 .

14. The optoelectronic semiconductor chip according to claim 10 , wherein at least 75% of the microdiodes are arranged inside an ESD layer, which has a thickness of at least half and at most three times the thickness of the active region.

15. The optoelectronic semiconductor chip according to claim 10 , wherein an ESD voltage pulse flows away through at least 50% of the microdiodes in a reverse direction of the microdiodes.

16. The optoelectronic semiconductor chip according to claim 10 , wherein at least 75% of the microdiodes are respectively arranged in the region of a threading dislocation.

17. The optoelectronic semiconductor chip according to claim 10 , wherein the second semiconductor layer sequence follows on directly from the first semiconductor layer sequence.

18. The optoelectronic semiconductor chip according to claim 10 , wherein the optoelectronic semiconductor chip emits blue and/or green light during operation.

19. The optoelectronic semiconductor chip according to claim 1 , wherein the current-voltage characteristic of the at least one microdiode is typical of a diode.

20. An optoelectronic semiconductor chip comprising:

a first semiconductor layer sequence comprising a multiplicity of microdiodes; and

a second semiconductor layer sequence comprising an active region,

wherein the first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material,

wherein the first semiconductor layer sequence is placed in front of the second semiconductor layer sequence in a growth direction,

wherein the microdiodes form an electrostatic discharge (ESD) protection for the active region,

wherein at least one of the microdiodes comprises a pn junction, wherein the active region comprises at least one pn junction,

wherein the pn junction of the least one microdiode and the pn junction of the active region are biased in the same direction,

wherein the pn junction of the least one microdiode has a higher threshold voltage in a forward direction than the pn junction of the active region, and

wherein the at least one microdiode is located inside an ESD layer that is based on gallium nitride (GaN), wherein the ESD layer was grown at a growth temperature below 900° C. by using a triethylgallium precursor with a nitrogen carrier gas.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2020
From: OSRAM OPTO SEMICONDUCTORS GMBH
To: OSRAM OLED GMBH
Reel/Frame 051467/0906 →
Priority Claims (1)
DE 10 2009 060 750 · Dec 30, 2009 · national
Continuity (3)
Continuation 14686364 · Apr 14, 2015
Division 13516676
Related Publication 20170338217A1 · Nov 23, 2017