Methods of forming one or more covered voids in a semiconductor substrate
Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.
1. A method of forming a covered void in a semiconductor substrate, comprising:
forming a pair of projections projecting upwardly from a semiconductor substrate, the projections comprising sidewalls, the projections comprising empty space laterally there-between;
providing elemental-form silicon atop the pair of projections; and
selectively growing relative to at least portions of the projection sidewalls a polysilicon-comprising material from the elemental-form silicon to bridge across the pair of projections to cover and not completely fill the empty space to form a covered void between the pair of projections, the selectively growing being at a rate of growth which is at least 2:1 compared to any rate of growth from the projection sidewalls for at least about 100 Angstroms of growth from the elemental-form silicon.
2. The method of claim 1 wherein providing the elemental-form silicon comprises depositing amorphous silicon, and annealing the amorphous silicon to be polycrystalline; and wherein the selectively growing occurs from the polycrystalline silicon.
3. The method of claim 1 comprising oxidizing the selectively grown polysilicon-comprising material to form a silicon dioxide-comprising bridge atop the covered void.
4. The method of claim 3 wherein the oxidizing oxidizes all the selectively grown polysilicon-comprising material to form silicon dioxide-comprising material.
5. The method of claim 1 wherein the elemental-form silicon atop the pair of projections projects laterally to cover only laterally-outermost portions of the empty space prior to said selectively growing.
6. The method of claim 5 wherein the elemental-form silicon is amorphous silicon.
7. The method of claim 1 wherein,
the projections are formed to project upwardly from a surface that is laterally between the pair of projections, the surface comprising elemental-form silicon; and further comprising:
selectively growing relative to at least portions of the projection sidewalls the polysilicon-comprising material from the elemental-form silicon of the surface, the covered void comprising a lowest base comprising the polysilicon that is grown from the surface.
8. The method of claim 1 wherein,
the elemental-form silicon that is atop both of the projections of the pair of projections has a respective lowest base prior to said selectively growing; and
the selectively growing grows the polysilicon-comprising material elevationally inward of said lowest bases.
9. The method of claim 8 wherein,
the selectively grown polysilicon-comprising material that is grown elevationally inward of said lowest bases comprises a top of the covered void; and
the projections are formed to project upwardly from a surface that is laterally between the pair of projections, the surface comprising elemental-form silicon, and further comprising:
selectively growing relative to at least portions of the projection sidewalls the polysilicon-comprising material from the elemental-form silicon of the surface, the covered void comprising a lowest base comprising the polysilicon that is grown from the surface.
10. The method of claim 1 comprising forming a gate insulator and conductive gate material in the covered void.
11. The method of claim 1 wherein the semiconductor substrate is a semiconductor-on-insulator substrate.