IP Library Granted Patent US 10,276,529
Granted Patent B2
US 10,276,529 · App. 15/687,691 · Granted Apr 30, 2019

Semiconductor devices including conductive pillars

Inventors: Anilkumar Chandolu (Boise, ID); Kenneth N. Hagen (Boise, ID)
Assignee: Micron Technology, Inc.
H01L24/13H01L22/20H01L24/03H01L24/05H01L25/0657H01L25/50H01L22/14H01L24/02H01L24/11H01L24/16H01L24/29H01L24/32H01L24/81H01L24/83H01L24/94H01L2224/0239H01L2224/02215H01L2224/0345H01L2224/0362H01L2224/03452H01L2224/03614H01L2224/03914H01L2224/03916H01L2224/03921H01L2224/0401H01L2224/05017H01L2224/05018H01L2224/05025H01L2224/0557H01L2224/0569H01L2224/05147H01L2224/05166H01L2224/05187H01L2224/05558H01L2224/05565H01L2224/05583H01L2224/05647H01L2224/05687H01L2224/05688H01L2224/1132H01L2224/1145H01L2224/1147H01L2224/11424H01L2224/11452H01L2224/11462H01L2224/11464H01L2224/11612H01L2224/11614H01L2224/11622H01L2224/11632H01L2224/13021H01L2224/13025H01L2224/13147H01L2224/16146H01L2224/2919H01L2224/2929H01L2224/29191H01L2224/29387H01L2224/32145H01L2224/73204H01L2224/81H01L2224/81203H01L2224/81424H01L2224/81447H01L2224/83H01L2224/8388H01L2224/83102H01L2224/83104H01L2224/83862H01L2224/94H01L2225/06513H01L2225/06541H01L2225/06596H01L2924/00012H01L2924/01005H01L2924/01013H01L2924/01014H01L2924/01022H01L2924/01028H01L2924/01029H01L2924/0474H01L2924/0503H01L2924/05994H01L2924/0715
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Quick Facts
Patent No.
US 10,276,529
App. No.
15/687,691
Filed
Aug 28, 2017
Granted
Apr 30, 2019
Kind
B2
Art Unit
2891
USPC
257/737
Abstract

A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described.

Claims (37)

1. A semiconductor device, comprising:

a conductive plug in electrical communication with active circuitry of a semiconductor die;

a conductive material over the conductive plug;

a dielectric material over the conductive material comprising an aperture exposing at least a portion of the conductive material;

a seed material within the aperture and in electrical contact with the conductive material;

a protective material within the aperture comprising an opening exposing a portion of the seed material at a bottom of the aperture; and

a conductive pillar over surfaces of the protective material and over surfaces of the seed material.

2. The semiconductor device of claim 1 , further comprising a conductive pillar of another semiconductor die in electrical contact with a conductive element of the semiconductor die, the conductive element on a side of the semiconductor die opposite the conductive pillar.

3. The semiconductor device of claim 1 , further comprising a conductive element of a logic die in contact with the conductive pillar of the semiconductor die.

4. The semiconductor device of claim 1 , further comprising a conductive pad over the conductive material within the aperture.

5. The semiconductor device of claim 1 , wherein the conductive pillar is at least partially within the aperture.

6. The semiconductor device of claim 1 , wherein the conductive plug comprises a through-substrate via in communication with active circuitry on a front side of the semiconductor device.

7. A semiconductor device, comprising:

a conductive plug in electrical communication with active circuitry of a semiconductor die;

a conductive material over the conductive plug;

a dielectric material over the conductive material comprising an aperture exposing at least a portion of the conductive material;

a seed material within the aperture and in electrical contact with the conductive material;

an insulative material within the aperture comprising an opening exposing a portion of the seed material at a bottom of the aperture; and

a conductive trace comprising a portion over surfaces of the insulative material and over surfaces of the seed material and extending laterally from the aperture over the dielectric material to a remote location.

8. The semiconductor device of claim 7 , further comprising a conductive bump over the conductive trace at the remote location.

9. The semiconductor device of claim 7 , wherein the seed material comprises aluminum, copper, or combinations thereof.

10. The semiconductor device of claim 7 , wherein the seed material comprises an adhesion material and a copper material.

11. The semiconductor device of claim 10 , wherein the adhesion material is in direct contact with the conductive material and the copper material is in direct contact with the adhesion material.

12. A semiconductor device, comprising:

a conductive plug in electrical communication with active circuitry of a semiconductor die;

a conductive material over the conductive plug;

a dielectric material over the conductive material;

a seed material in electrical contact with the conductive material;

a protective material over sidewalls and a portion of horizontal surfaces of the seed material; and

a conductive pillar in contact with the protective material and the seed material.

13. The semiconductor device of claim 12 , wherein side surfaces of the seed material are substantially coplanar with side surfaces of the protective material.

14. The semiconductor device of claim 12 , further comprising a conductive pad material over the conductive material.

15. The semiconductor device of claim 14 , wherein the conductive pad material is laterally adjacent the conductive pillar and directly over the conductive material.

16. The semiconductor device of claim 12 , further comprising a conductive pad over the conductive material.

17. The semiconductor device of claim 16 , wherein the conductive pad is between the conductive material and the seed material.

18. The semiconductor device of claim 12 , further comprising a bond pad in contact with the conductive pillar.

19. The semiconductor device of claim 12 , wherein the horizontal surfaces of the seed material extend laterally beyond a width of the conductive pillar.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050709/0838 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046597/0333 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 044348/0253 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 044653/0333 →
Continuity (2)
Division 14608466 · Jan 29, 2015
Related Publication 20170358547A1 · Dec 14, 2017