Controlled ion implantation into silicon carbide using channeling and devices fabricated using controlled ion implantation into silicon carbide using channeling
Methods of forming a semiconductor structure include the use of channeled implants into silicon carbide crystals. Some methods include providing a silicon carbide layer having a crystallographic axis, heating the silicon carbide layer to a temperature of about 300° C. or more, implanting dopant ions into the heated silicon carbide layer at an implant angle between a direction of implantation and the crystallographic axis of less than about 2°, and annealing the silicon carbide layer at a time-temperature product of less than about 30,000° C.-hours to activate the implanted ions.
1. An electronic device, comprising:
a silicon carbide drift region having a first conductivity type and a first doping concentration;
a well region in the drift region, the well region having a second conductivity type opposite the first conductivity type and having a second doping concentration; and
a deeply implanted region below the well region, wherein the deeply implanted region has a third doping concentration that is greater than the first doping concentration and less than the second doping concentration.
2. The electronic device of claim 1 , wherein the drift region comprises a drift layer having the first doping concentration and a current spreading layer having a fourth doping concentration on the drift layer;
wherein the fourth doping concentration is higher than the first doping concentration of the drift layer and lower than the third doping concentration of the deeply implanted region.
3. The electronic device of claim 2 , wherein the deeply implanted region extends to a depth that is less than a thickness of the current spreading layer.
4. The electronic device of claim 2 , wherein the current spreading layer has a thickness of from about 2.5 microns to about 4.5 microns.
5. The electronic device of claim 2 , wherein the current spreading layer has a doping concentration of from about 1E16 cm −3 to about 2E17 cm −3 .
6. The electronic device of claim 2 , wherein the drift layer has a thickness of from about 2.5 microns to about 4.5 microns.
7. The electronic device of claim 2 , wherein the drift layer has a doping concentration of from about 6E15 cm −3 to about 2E16 cm −3 .
8. The electronic device of claim 1 , wherein the deeply implanted region extends to a depth of from about 2.5 microns to about 4.5 microns into the drift region.
9. The electronic device of claim 1 , wherein the deeply implanted region has a doping concentration of from about 1E16 cm −3 to about 2E17 cm −3 .
10. The electronic device of claim 1 , wherein the deeply implanted region has a doping concentration that varies by less than about 25% from a peak concentration over a depth of at least about 1 micron.
11. A diode, comprising:
a silicon carbide drift region having a first conductivity type and a first doping concentration; and
a deeply implanted region in the silicon carbide drift region, wherein the deeply implanted region has a second doping concentration that is greater than the first doping concentration and extends to a first depth that is from about 2.5 microns to about 4.5 microns, wherein the first depth is less than a thickness of the silicon carbide drift region.
12. The diode of claim 11 , wherein silicon carbide drift region has a thickness that is less than a thickness that would be required to sustain a given reverse blocking voltage in the absence of the deeply implanted region.
13. The diode of claim 11 , wherein the Schottky diode has a lower on resistance than would be obtainable for a given reverse blocking voltage in the absence of the deeply implanted region.
14. The diode of claim 11 , wherein the deeply implanted region extends to a depth of from about 2.5 microns to about 4.5 microns into the drift region.
15. The diode of claim 11 , wherein the deeply implanted region has a doping concentration of from about 1E16 cm −3 to about 2E17 cm −3 .
16. A diode, comprising:
a silicon carbide drift layer having a first conductivity type and a first doping concentration;
a silicon carbide epitaxial layer having a second conductivity type opposite the first conductivity type on the silicon carbide drift layer and having a second doping concentration that is greater than the first doping concentration, wherein the silicon carbide epitaxial layer has a thickness greater than about 2.5 microns; and
a deeply implanted region extending through the silicon carbide epitaxial layer and into the silicon carbide drift layer, wherein the deeply implanted region has the first conductivity type and has a third doping concentration that is less than the second doping concentration.
17. A method of forming an electronic device, comprising:
providing a silicon carbide drift region having a first conductivity type and a first doping concentration and having a crystallographic axis;
forming a well region in the drift region, the well region having a second conductivity type opposite the first conductivity type and having a second doping concentration; and
implanting dopant ions to form a deeply implanted region below the well region, wherein the deeply implanted region has the second conductivity type and has a third doping concentration that is greater than the first doping concentration and less than the second doping concentration, and wherein implanting the dopant ions comprises implanting the dopant ions at an implant angle between a direction of implantation and the crystallographic axis of less than about 2°.
18. The method of claim 17 , wherein the implant angle is greater than 0.1°.
19. The method of claim 17 , wherein the implant angle is between 0.1° and 1°.
20. The method of claim 17 , wherein the drift region comprises a drift layer having the first doping concentration, the method further comprising forming a current spreading layer having a fourth doping concentration on the drift layer;
wherein the fourth doping concentration is higher than the first doping concentration of the drift layer and lower than the third doping concentration of the deeply implanted region.
21. The method of claim 20 , wherein implanting the dopant ions comprises implanting the dopant ions to a depth that is less than a thickness of the current spreading layer.
22. The method of claim 20 , wherein drift layer has a thickness that is less than a thickness that would be required to sustain a given reverse blocking voltage in the absence of the deeply implanted region.
23. The method of claim 20 , wherein the fourth doping concentration of the current spreading layer is greater than would be required to sustain a given reverse blocking voltage in the absence of the deeply implanted region.
24. The method of claim 20 , wherein the electronic device has a lower on resistance than would be obtainable for a given reverse blocking voltage in the absence of the deeply implanted region.
25. The method of claim 20 , wherein the current spreading layer has a thickness of from about 2.5 microns to about 4.5 microns.
26. The method of claim 20 , wherein the current spreading layer has a doping concentration of from about 1E16 cm −3 to about 2E17 cm −3 .
27. The method of claim 20 , wherein the drift layer has a thickness of from about 0 microns to about 10 microns.
28. The method of claim 20 , wherein the drift layer has a doping concentration of from about 6E15 cm −3 to about 2E16 cm −3 .
29. The method of claim 16 , wherein the deeply implanted region extends to a depth of from about 2.5 microns to about 4.5 microns into the drift layer.
30. The method of claim 16 , wherein the deeply implanted region has a doping concentration of from about 1E16 cm −3 to about 2E17 cm −3 .
31. The method of claim 16 , wherein the deeply implanted region contacts the well region.