Techniques for reducing uneven aging in integrated circuits

1. An integrated circuit comprising:

first circuits that are configured to implement a user design for the integrated circuit;

second circuits that are unused by the user design;

configuration circuitry that couples the second circuits together through a network of conductors, wherein transistors in the second circuits turn on and off in response to a varying signal that continues to propagate through the second circuits and through the network of conductors while the first circuits implement the user design; and

third circuits that are unused by the user design, wherein the configuration circuitry couples the third circuits together through the network of conductors, and wherein transistors in the third circuits turn on and off in response to an additional varying signal that continues to propagate through the third circuits while the first circuits implement the user design.

2. The integrated circuit of claim 1 , wherein the configuration circuitry couples the second circuits as a ring oscillator circuit.

3. The integrated circuit of claim 2 , wherein the configuration circuitry couples the third circuits as an additional ring oscillator circuit.

4. The integrated circuit of claim 1 , wherein the configuration circuitry couples the third circuits as ring oscillator circuit.

5. The integrated circuit of claim 1 , wherein the configuration circuitry comprises a controller circuit that generates the varying signal and that provides the varying signal from the configuration circuitry to the second circuits through the network of conductors to generate switching activity in the transistors in the second circuits while the first circuits implement the user design.

6. The integrated circuit of claim 1 , wherein the integrated circuit is a programmable integrated circuit, wherein the first and second circuits comprise programmable logic circuits, and wherein the programmable logic circuits in the first circuits are configured to implement the user design.

7. The integrated circuit of claim 6 , wherein the configuration circuitry configures the programmable logic circuits in the second circuits to function as a ring oscillator circuit having an odd number of inverter circuits coupled in a loop circuit.

8. The integrated circuit of claim 7 , wherein the configuration circuitry configures the third circuits to function as an additional ring oscillator circuit.

9. A method for reducing effects of uneven aging in an integrated circuit, the method comprising:

configuring first circuits to implement a user design for the integrated circuit;

coupling second circuits together through a network of conductors using configuration circuitry, wherein the second circuits are unused by the user design;

generating switching activity in the second circuits in response to a varying signal that propagates through the second circuits and through the network of conductors while the first circuits implement the user design;

coupling third circuits together through the network of conductors using the configuration circuitry, wherein the third circuits are unused by the user design; and

generating switching activity in the third circuits in response to an additional varying signal that propagates through the third circuits while the first circuits implement the user design.

10. The method of claim 9 , wherein coupling the second circuits together through the network of conductors using the configuration circuitry further comprises coupling the second circuits together to function as a ring oscillator circuit.

11. The method of claim 10 , wherein coupling the third circuits together further comprises coupling the third circuits as an additional ring oscillator circuit using the configuration circuitry.

12. The method of claim 9 , wherein coupling the third circuits together further comprises coupling the third circuits as a ring oscillator circuit using the configuration circuitry.

13. The method of claim 9 , wherein generating switching activity in the second circuits in response to the varying signal further comprises generating the varying signal using a controller circuit and providing the varying signal from the controller circuit to the second circuits through the network of conductors to generate switching activity in the second circuits while the first circuits implement the user design.

14. The method of claim 9 , wherein the integrated circuit is a programmable logic integrated circuit, and wherein the first and second circuits comprise programmable logic circuits.

15. The method of claim 14 further comprising:

configuring the programmable logic circuits in the second circuits using the configuration circuitry to function as a ring oscillator circuit having an odd number of inverter circuits coupled in a loop circuit.