Semiconductor device and manufacture method thereof
A semiconductor device includes a semiconductor substrate and at least one gate stack. The gate stack is present on the semiconductor substrate, and the gate stack includes at least one work function conductor and a filling conductor. The work function conductor has a recess therein. The filling conductor includes a plug portion and a cap portion. The plug portion is present in the recess of the work function conductor. The cap portion caps the work function conductor.
1. A semiconductor device, comprising:
a first gate stack comprising:
a first work function conductor; and
a first filling conductor comprising a plug portion and a cap portion, wherein:
the plug portion of the first filling conductor is disposed between a first sidewall of the first work function conductor and a second sidewall of the first work function conductor, and
the cap portion of the first filling conductor overlies an uppermost surface of the first work function conductor; and
a first gate spacer disposed on a first side of the first gate stack and a second gate spacer disposed on a second side of the first gate stack opposite the first side, wherein:
a sidewall of the cap portion and the first sidewall of the first work function conductor are in direct contact with a sidewall of the first gate spacer.
2. The semiconductor device of claim 1 , the first gate stack comprising a second work function conductor disposed between the plug portion of the first filling conductor and the first sidewall of the first work function conductor and between the plug portion of the first filling conductor and the second sidewall of the first work function conductor.
3. The semiconductor device of claim 2 , wherein the first work function conductor is a p-type work function conductor and the second work function conductor is an n-type work function conductor.
4. The semiconductor device of claim 1 , comprising a dielectric cap, wherein the dielectric cap is separated from the first work function conductor by the cap portion of the first filling conductor.
5. The semiconductor device of claim 1 , comprising:
a second gate stack comprising:
the first work function conductor;
a second work function conductor; and
a second filling conductor comprising a plug portion and a cap portion, wherein:
the plug portion of the second filling conductor is disposed between a first sidewall of the second work function conductor and a second sidewall of the second work function conductor,
the plug portion of the second filling conductor is separated from the first work function conductor by the second work function conductor, and
the cap portion of the second filling conductor overlies an uppermost surface of the first work function conductor and an uppermost surface of the second work function conductor.
6. The semiconductor device of claim 5 , wherein the first gate stack is a p-type gate stack and the second gate stack is an n-type gate stack.
7. The semiconductor device of claim 1 , comprising a semiconductor fin disposed below the first gate stack.
8. The semiconductor device of claim 1 , comprising:
a second gate stack comprising the first work function conductor, wherein:
a portion of the first work function conductor of the first gate stack has a first tapered profile, and
a portion of the first work function conductor of the second gate stack has a second tapered profile different than the first tapered profile.
9. A semiconductor device, comprising:
a first gate spacer and a second gate spacer; and
a gate stack disposed between the first gate spacer and the second gate spacer, the gate stack comprising:
a gate dielectric in direct contact with the first gate spacer and the second gate spacer;
a first work function conductor over the gate dielectric and in direct contact with the first gate spacer and the second gate spacer; and
a filling conductor comprising a plug portion and a cap portion, wherein:
the plug portion is disposed between a first sidewall of the first work function conductor and a second sidewall of the first work function conductor, and
the cap portion caps the first work function conductor.
10. The semiconductor device of claim 9 , wherein the first work function conductor is in direct contact with a top surface of the gate dielectric.
11. The semiconductor device of claim 9 , wherein the cap portion of the filling conductor is in direct contact with the first gate spacer and the second gate spacer.
12. The semiconductor device of claim 9 , comprising:
a dielectric cap, wherein the dielectric cap is separated from the first work function conductor by the cap portion of the filling conductor.
13. The semiconductor device of claim 9 , comprising a second work function conductor disposed between the first work function conductor and the plug portion of the filling conductor.
14. The semiconductor device of claim 13 , wherein the first work function conductor is disposed between the second work function conductor and the gate dielectric.
15. A method of manufacturing a semiconductor device, the method comprising:
forming a first gate spacer and a second gate spacer;
forming a first work function conductor between the first gate spacer and the second gate spacer, wherein the first work function conductor defines a recess;
forming a mask in a portion of the recess to conceal a first portion of the first work function conductor, wherein a second portion of the first work function conductor is not concealed by the mask;
recessing the first work function conductor between the first gate spacer and the second gate spacer to expose a first portion of a sidewall of the first gate spacer and a first portion of a sidewall of the second gate spacer;
removing the mask after the recessing the first work function conductor;
forming a filling conductor in the recess and in a space between the first portion of the sidewall of the first gate spacer and the first portion of the sidewall of the second gate spacer; and
recessing the filling conductor to expose a second portion of the sidewall of the first gate spacer and a second portion of the sidewall of the second gate spacer.
16. The method of claim 15 , wherein the recessing the first work function conductor comprises tapering some of the second portion of the first work function conductor.
17. The method of claim 15 , comprising:
forming a dielectric cap between the second portion of the sidewall of the first gate spacer and the second portion of the sidewall of the second gate spacer.
18. The method of claim 15 , comprising:
forming a second work function conductor between the first gate spacer and the second gate spacer before the forming a first work function conductor.
19. The method of claim 18 , comprising recessing the second work function conductor, wherein the recessing the second work function conductor comprises tapering some of the second work function conductor.
20. The method of claim 18 , wherein the first work function conductor is an n-type work function conductor and the second work function conductor is a p-type work function conductor.