IP Library Granted Patent US 10,304,697
Granted Patent B2
US 10,304,697 · App. 15/725,938 · Granted May 28, 2019

Electronic device with top side pin array and manufacturing method thereof

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Quick Facts
Patent No.
US 10,304,697
App. No.
15/725,938
Granted
May 28, 2019
Kind
B2
Abstract

An electronic device and a manufacturing method thereof. As non-limiting examples, various aspects of this disclosure provide an electronic device having a top side pin array, for example which may be utilized for three-dimensional stacking, and a method for manufacturing such an electronic device.

Claims (40)

1. A method of manufacturing an electronic device, the method comprising:

receiving a substrate that comprises a plurality of pads and a plurality of solder members, each solder member of the plurality of solder members positioned on a respective pad of the plurality of pads;

positioning a pin template comprising a plurality of apertures above the substrate such that each aperture of the plurality of apertures aligns with a respective pad of the plurality of pads;

placing a plurality of pins on an upper surface of the pin template;

moving the plurality of pins with respect to the upper surface of the pin template such that each pin of the plurality of pins falls into a respective aperture of the plurality of apertures;

lifting the pin template away from the substrate and the plurality of pins; and

attaching the plurality of pins to the plurality of pads by reflowing the plurality of solder members.

2. The method of claim 1 , further comprising removing a temporary carrier from a signal distribution structure of the substrate.

3. The method of claim 2 , further comprising mounting a semiconductor die to the signal distribution structure.

4. The method of claim 1 , wherein said moving the the plurality of pins comprises vibrating the pin template.

5. The method of claim 1 , wherein said positioning the pin template above the substrate is performed before said placing the plurality of pins.

6. The method of claim 1 , wherein each pin of the plurality of pins is cylinder-shaped.

7. The method of claim 6 , wherein each pin of the plurality of pins comprises a curved transition between an end surface and a side surface.

8. The method of claim 1 , wherein:

each aperture of the plurality of apertures has an aperture diameter; and

each pin of the plurality of pins comprises a cylinder-shaped main body having a body diameter that is less than the aperture diameter, and a head having a head diameter that is greater than the aperture diameter.

9. The method of claim 1 , further comprising:

holding each pin of the plurality of pins in the respective aperture of the plurality of apertures with an adhesive tape; and

removing the adhesive tape after said positioning the pin template above the substrate.

10. The method of claim 1 , wherein after said reflowing the solder members, each reflowed solder member comprises a portion that lies between its respective pad and its respective pin.

11. The method of claim 1 , further comprising:

coupling a semiconductor die to the substrate and positioned laterally between at least two pins of the plurality of pins; and

encapsulating the semiconductor die and the plurality of pins in an encapsulating material.

12. A method of manufacturing an electronic device, the method comprising:

receiving a substrate that comprises a plurality of pads;

placing a plurality of pins on a pin template comprising a plurality of apertures;

moving each pin of the plurality of pins such that each pin falls into a respective aperture of the plurality of apertures;

aligning the plurality of apertures with a respective pad of the plurality of pads; and

attaching each pin of the plurality of pins to its respective pad.

13. The method of claim 12 , wherein each pad of the plurality of pads has a respective solder member thereon prior to said aligning.

14. The method of claim 12 , wherein said aligning comprises positioning the pin template above the substrate prior to said moving each pin of the plurality of pins.

15. The method of claim 14 , further comprising holding each pin of the plurality of pins in its respective aperture prior to said positioning the pin template above the substrate.

16. The method of claim 12 , wherein after said attaching, a layer of solder lies between each pin of the plurality of pins and its respective pad.

17. A method of manufacturing an electronic device, the method comprising:

providing a pin template comprising a plurality of apertures;

positioning the pin template above a substrate such that the plurality of apertures align with a plurality of pads of the substrate;

moving a plurality of pins in relation to the pin template such that each pin of the plurality of pins is positioned in a respective aperture of the plurality of apertures and aligned with a respective pad of the plurality of pads; and

soldering each pin of the plurality of pins to said respective pad of the substrate.

18. The method of claim 17 , further comprising removing a temporary carrier from a signal distribution structure of the substrate after said soldering.

19. The method of claim 18 , further comprising mounting a semiconductor die that comprises active semiconductor circuitry to the signal distribution structure.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054046/0673 →
SECURITY INTEREST Recorded Aug 1, 2018
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 046683/0139 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2017
From: BALARAMAN, DEVARAJAN; RICHTER, DANIEL; HAMES, GREG; ZEHNDER, DEAN; RINNE, GLENN
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 043799/0227 →