IP Library › Granted Patent US 10,158,330
Granted Patent B1
US 10,158,330 · App. 15/728,202 · Granted Dec 18, 2018

Multi-mode envelope tracking amplifier circuit

Inventor: Nadim Khlat (Cugnaux, FR)
Assignee: Qorvo US, Inc.
H03F1/0211H03F1/30H03F3/195H03F3/211H03F3/213H03F2200/102H03F2200/111H03F2200/216H03F2200/231H03F2200/252H03F2200/267H03F2200/432H03F2200/447H03F2200/451
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Quick Facts
Patent No.
US 10,158,330
App. No.
15/728,202
Granted
Dec 18, 2018
Kind
B1
Abstract

A multi-mode envelope tracking (ET) amplifier circuit is provided. The multi-mode ET amplifier circuit can operate in a low-resource block (RB) mode, a mid-RB mode, and a high-RB mode. The multi-mode ET amplifier circuit includes fast switcher circuitry having a first switcher path and a second switcher path and configured to generate an alternating current (AC) current. A control circuit activates the fast switcher circuitry in the mid-RB mode and the high-RB mode, while deactivating the fast switcher circuitry in the low-RB mode. More specifically, the control circuit selectively activates one of the first switcher path and the second switcher path in the mid-RB mode and activates both the first switcher path and the second switcher path in the high-RB mode. As a result, it is possible to improve efficiency of ET tracker circuitry and the multi-mode ET amplifier circuit in all operation modes.

Claims (77)

1. A multi-mode envelope tracking (ET) amplifier circuit comprising:

an output node;

at least one power amplifier circuit coupled to the output node and configured to amplify a radio frequency (RF) signal;

ET tracker circuitry configured to provide an ET modulated voltage to the output node;

fast switcher circuitry comprising a first switcher path and a second switcher path and configured to generate an alternate current (AC) current; and

a control circuit configured to:

deactivate the fast switcher circuitry in a low-resource block (RB) mode;

activate the fast switcher circuitry to provide the AC current to the output node via a selected switcher path among the first switcher path and the second switcher path in a mid-RB mode in which the RF signal comprises more RBs than in the low-RB mode; and

activate the fast switcher circuitry to provide the AC current to the output node via the first switcher path and the second switcher path in a high-RB mode in which the RF signal comprises more RBs than in the mid-RB mode.

2. The multi-mode ET amplifier circuit of claim 1 wherein:

in the low-RB mode, the RF signal comprises less than or equal to one hundred RBs;

in the mid-RB mode, the RF signal comprises more than one hundred RBs and less than three hundred RBs; and

in the high-RB mode, the RF signal comprises greater than or equal to three hundred RBs.

3. The multi-mode ET amplifier circuit of claim 1 further comprising slow switcher circuitry configured to generate a direct current (DC) current, wherein the control circuit is further configured to activate the slow switcher circuitry to provide the DC current to the output node in the low-RB mode, the mid-RB mode, and the high-RB mode.

4. The multi-mode ET amplifier circuit of claim 3 wherein the slow switcher circuitry is further configured to provide the AC current to the output node in the low-RB mode.

5. The multi-mode ET amplifier circuit of claim 4 wherein the at least one power amplifier circuit is further configured to amplify the RF signal to a determined power based on the ET modulated voltage, the AC current, and the DC current at the output node in the low-RB mode, the mid-RB mode, and the high-RB mode.

6. The multi-mode ET amplifier circuit of claim 3 wherein:

the first switcher path comprises a first DC-DC converter and a first inductor having a first inductance, the first inductor configured to generate the AC current;

the second switcher path comprises the first DC-DC converter and a second inductor having a second inductance, the second inductor configured to generate the AC current; and

the slow switcher circuitry comprises a second DC-DC converter and a third inductor having a third inductance higher than the first inductance and the second inductance.

7. The multi-mode ET amplifier circuit of claim 6 wherein the first inductance equals or differs from the second inductance.

8. The multi-mode ET amplifier circuit of claim 6 further comprising an offset capacitor configured to couple the ET tracker circuitry, the first switcher path, and the second switcher path to the output node.

9. The multi-mode ET amplifier circuit of claim 8 wherein the control circuit comprises:

a slow switcher controller coupled to the slow switcher circuitry and configured to activate the slow switcher circuitry in the low-RB mode and the high-RB mode; and

a fast switcher controller coupled to the fast switcher circuitry and configured to:

activate the selected switcher path in the mid-RB mode;

activate the first switcher path and the second switcher path in the high-RB mode; and

deactivate the fast switcher circuitry in the low-RB mode.

10. The multi-mode ET amplifier circuit of claim 9 wherein the slow switcher controller and the fast switcher controller are bang-band controllers (BBCs).

11. The multi-mode ET amplifier circuit of claim 9 wherein the fast switcher controller is further configured to:

activate the fast switcher circuitry in response to the ET tracker circuitry sourcing the AC current to the output node; and

deactivate the fast switcher circuitry in response to the ET tracker circuitry sinking the AC current from the output node.

12. The multi-mode ET amplifier circuit of claim 11 wherein:

the fast switcher circuitry is further configured to generate a switcher sense current in proportion to the AC current generated by the fast switcher circuitry; and

the ET tracker circuitry is further configured to generate a tracker sense current in proportion to the AC current sourced or sank by the ET tracker circuitry, wherein:

the tracker sense current is a positive current in response to the ET tracker circuitry sourcing the AC current; and

the tracker sense current is a negative current in response to the ET tracker circuitry sinking the AC current.

13. The multi-mode ET amplifier circuit of claim 12 wherein the fast switcher controller is further configured to:

receive the tracker sense current from the ET tracker circuitry;

control the fast switcher circuitry to increase the AC current in response to the tracker sense current being the positive current; and

control the fast switcher circuitry to reduce the AC current in response to the tracker sense current being the negative current.

14. The multi-mode ET amplifier circuit of claim 13 wherein the fast switcher controller is further configured to:

activate the selected switcher path between the first switcher path and the second switcher path in response to the tracker sense current being higher than a first positive current threshold and lower than a second positive current threshold that is higher than the first positive current threshold;

activate the first switcher path and the second switcher path in response to the tracker sense current being higher than the second positive current threshold; and

deactivate the first switcher path and the second switcher path in response to the tracker sense current being lower than the first positive current threshold.

15. The multi-mode ET amplifier circuit of claim 13 wherein the slow switcher controller is further configured to:

receive the tracker sense current from the ET tracker circuitry;

receive the switcher sense current from the fast switcher circuitry; and

control the slow switcher circuitry to adjust the DC current based on the switcher sense current and the tracker sense current.

16. The multi-mode ET amplifier circuit of claim 9 further comprising delay compensation circuitry coupled to the ET tracker circuitry and the fast switcher controller, the delay compensation circuitry configured to compensate for a processing delay associated with the fast switcher controller and the fast switcher circuitry.

17. A multi-mode envelope tracking (ET) amplifier circuit comprising:

a first output node;

a second output node;

at least one power amplifier circuit configured to amplify a radio frequency (RF) signal, the at least one power amplifier circuit comprises:

a driver stage power amplifier; and

an output stage differential power amplifier comprising a plus power amplifier and a minus power amplifier;

first ET tracker circuitry configured to provide a first ET modulated voltage to the first output node;

second ET tracker circuitry configured to provide a second ET modulated voltage to the second output node;

first fast switcher circuitry configured to provide a first alternate current (AC) current to the first output node;

second fast switcher circuitry configured to provide a second AC current to the second output node; and

a control circuit configured to:

deactivate the first fast switcher circuitry and the second fast switcher circuitry in a low-resource block (RB) mode;

activate the first fast switcher circuitry to provide the first AC current to the first output node in a mid-RB mode and a high-RB mode in which the RF signal comprises more RBs than in the low-RB mode; and

activate the second fast switcher circuitry to provide the second AC current to the second output node in the mid-RB mode and the high-RB mode in which the RF signal comprises more RBs than in the mid-RB mode.

18. The multi-mode ET amplifier circuit of claim 17 wherein:

in the low-RB mode, the RF signal comprises less than or equal to one hundred RBs;

in the mid-RB mode, the RF signal comprises more than one hundred RBs and less than three hundred RBs; and

in the high-RB mode, the RF signal comprises greater than or equal to three hundred RBs.

19. The multi-mode ET amplifier circuit of claim 17 further comprising:

first slow switcher circuitry configured to generate a first direct current (DC) current; and

second slow switcher circuitry configured to generate a second DC current;

wherein the control circuit is further configured to:

activate the first slow switcher circuitry to provide the first DC current to the first output node in the low-RB mode, the mid-RB mode, and the high-RB mode; and

activate the second slow switcher circuitry to provide the second DC current to the second output node in the low-RB mode, the mid-RB mode, and the high-RB mode.

20. The multi-mode ET amplifier circuit of claim 17 wherein:

the plus power amplifier and the minus power amplifier are coupled to a common node; and

the common node is coupled to the first output node and the second output node.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2017
From: KHLAT, NADIM
To: QORVO US, INC.
Reel/Frame 044969/0098 →
Continuity (1)
Provisional Application 62533177 · Jul 17, 2017
Cited By (9)
US 12,212,285 US 12,212,286 US 12,231,098 US 12,265,442 US 12,267,046 US 12,562,688 US 12,627,269 US 12,700,831 US 12,738,894