IP Library › Granted Patent US 12,267,046
Granted Patent B2
US 12,267,046 · App. 17/579,796 · Granted Apr 1, 2025

Power amplifier system

Inventor: Nadim Khlat (Cugnaux, FR)
Assignee: Qorvo US, Inc.
H03F1/0233H03F1/0288H03F3/21H03F2200/105
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Quick Facts
Patent No.
US 12,267,046
App. No.
17/579,796
Granted
Apr 1, 2025
Kind
B2
Abstract

A power amplifier system having a carrier amplifier having a first supply node, a peaking amplifier having a second supply node, and envelope tracking (ET) circuitry is disclosed. The ET circuitry has a first tracking amplifier that generates a first voltage signal at the first supply node, a second tracking amplifier that generates a second voltage signal at the second supply node, and a transistor coupled between the first supply node and the second supply node. A control circuit has a first input coupled to an output of both or either of the first tracking amplifier and the second tracking amplifier and a control output terminal coupled to a control input terminal of the transistor, wherein the control circuit is configured to progressively turn on the transistor to pass current from the first supply node to the second supply node as the peaking amplifier progressively becomes active.

Claims (26)

1. A power amplifier system comprising:

a carrier amplifier having a first supply node;

a peaking amplifier having a second supply node; and

envelope tracking (ET) circuitry comprising:

a first tracking amplifier configured to generate a first voltage signal at the first supply node;

a second tracking amplifier configured to generate a second voltage signal at the second supply node;

a transistor having a first current terminal coupled the first supply node and a second current terminal coupled to the second supply node; and

a control circuit having a first input coupled to an output of both or either of the first tracking amplifier and the second tracking amplifier and a control output terminal coupled to a control input terminal of the transistor, wherein the control circuit is configured to progressively turn on the transistor to pass current from the first supply node to the second supply node as the peaking amplifier progressively becomes active, wherein the control circuit is configured to cause a rate of change of peaking current supplying the peaking amplifier to be greater than a rate of change of carrier current supplying the carrier amplifier until the carrier current and the peaking current are substantially equal.

2. The power amplifier system of claim 1 wherein the control circuit determines that the peaking amplifier is becoming increasingly active by monitoring a tracking output voltage at the first input of the control circuit.

3. The power amplifier system of claim 2 wherein the control circuit has a second input coupled to the second node to monitor voltage at the second node.

4. The power amplifier system of claim 3 wherein the control circuit is configured to monitor a differential voltage between the first input and the second input and in response progressively turn on the transistor to pass current from the first supply node to the second node as the peaking amplifier progressively becomes active.

5. The power amplifier system of claim 1 wherein the first voltage signal has a first amplitude modulation that follows the envelope of a radio frequency signal received by the ET circuitry and the second voltage signal has a second amplitude modulation that follows the envelope of the radio frequency signal received by the ET circuitry.

6. The power amplifier system of claim 1 wherein the rate of change of peaking current supplying the peaking amplifier has a slope that is at least twice a slope of the rate of change of the carrier current supplying the carrier amplifier.

7. The power amplifier system of claim 1 wherein the ET circuitry is integrated into an ET integrated circuit (ETIC).

8. The power amplifier system of claim 1 wherein the ET circuitry is configured to ensure that a voltage at the first supply node supplying the carrier amplifier is remains greater than or equal to the voltage at the second supply node supplying the peaking amplifier.

9. The power amplifier system of claim 1 wherein the ET circuitry further comprises a tracker circuit having a micro-charge-pump with an output coupled to the first supply node through a power inductor.

10. The power amplifier system of claim 1 wherein the transistor is a field-effect transistor.

11. The power amplifier system of claim 1 wherein the carrier amplifier and the peaking amplifier are coupled in a Doherty amplifier configuration.

12. The power amplifier system of claim 11 further comprising a first impedance inverter coupled between a signal output of the carrier amplifier and a signal output of the peaking amplifier.

13. The power amplifier system of claim 12 further comprising a second impedance inverter coupled between a signal input of the carrier amplifier and a signal input of the peaking amplifier.

14. The power amplifier system of claim 13 wherein the first impedance inverter and the second impedance inverter have substantially different impedance inverter ratios.

15. The power amplifier system of claim 1 further comprising a first capacitor coupled between an output of first tracking amplifier and the first supply node.

16. The power amplifier system of claim 15 further comprising a second capacitor coupled between an output of the second tracking amplifier and the second supply node.

17. The power amplifier system of claim 15 wherein capacitance of the second capacitor is an order of magnitude less than capacitance of the first capacitor.

18. The power amplifier system of claim 1 wherein the control circuit is further configured to adjust a supply voltage at the first supply node based on values stored in a first envelope tracking look-up table (ET-LUT) to provide isometric gain operation of the carrier amplifier.

19. The power amplifier system of claim 1 wherein the control circuit is further configured to adjust a supply voltage at the second supply node based on values stored in a second ET-LUT to provide isometric gain operation of the peaking amplifier.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2022
From: KHLAT, NADIM
To: QORVO US, INC.
Reel/Frame 058792/0065 →
Continuity (2)
Provisional Application 63149556 · Feb 15, 2021
Related Publication 20220263474A1 · Aug 18, 2022
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