Semiconductor stack
A semiconductor stack includes a substrate made of silicon carbide, and an epi layer disposed on the substrate and made of silicon carbide. An epi principal surface, which is a principal surface opposite to the substrate, of the epi layer is a carbon surface having an off angle of 4° or smaller relative to a c-plane. In the epi principal surface, a plurality of first recessed portions having a rectangular circumferential shape in a planar view is famed. Density of a second recessed portion that is formed in the first recessed portions and is a recessed portion deeper than the first recessed portions is lower than or equal to 10 cm −2 in the epi principal surface.
1. A semiconductor stack, comprising:
a substrate made of silicon carbide; and
an epi layer disposed on the substrate and made of silicon carbide,
wherein an epi principal surface of the epi layer, the epi principal surface being a principal surface opposite to the substrate, is a carbon surface having an off angle of 4° or smaller relative to a c-plane,
wherein a plurality of first recessed portions having an outer shape of a rectangular shape in a planar view is formed in the epi principal surface, and
wherein density of a second recessed portion that is formed in the first recessed portions and is a recessed portion deeper than the first recessed portions, is lower than or equal to 10 cm −2 in the epi principal surface.
2. The semiconductor stack as claimed in claim 1 , wherein the first recessed portions are connected a threading dislocation that penetrates through the epi layer in a thickness direction.
3. The semiconductor stack as claimed in claim 1 , wherein the density of the second recessed portion exceeds 0 cm −2 in the epi principal surface.
4. The semiconductor stack as claimed in claim 2 , wherein the density of the second recessed portion exceeds 0 cm −2 in the epi principal surface.
5. The semiconductor stack as claimed in claim 3 ,
wherein a depth of the first recessed portions is shallower than or equal to 1 nm, and
wherein a depth of the second recessed portion is deeper than or equal to 10 nm.
6. The semiconductor stack as claimed in claim 5 , wherein the depth of the second recessed portion is deeper than or equal to 2 nm.
7. The semiconductor stack as claimed in claim 1 , wherein the density of the second recessed portion is lower than or equal to 1 cm −2 in the epi principal surface.
8. The semiconductor stack as claimed in claim 1 , wherein a diameter of the substrate is greater than or equal to 100 mm.