IP Library Granted Patent US 10,872,832
Granted Patent B2
US 10,872,832 · App. 15/772,483 · Granted Dec 22, 2020

Pre-molded active IC of passive components to miniaturize system in package

Inventors: Mao Guo (Shanghai, CN); John G. Meyers (Sacramento, CA); Yong She (Songjiang, CN); Bin Liu (Shanghai, CN); Lingyan L. Tan (Shanghai, CN)
Assignee: Intel Corporation
H01L23/28H01L23/02H01L23/5385H01L25/065H01L25/0657H01L25/105H01L25/50H01L23/3128H01L2224/32145H01L2224/48227H01L2224/73265H01L2225/0651H01L2225/06506H01L2225/06555H01L2225/06562H01L2924/15311H01L2924/181
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Quick Facts
Patent No.
US 10,872,832
App. No.
15/772,483
Granted
Dec 22, 2020
Kind
B2
Abstract

A system in package and method of making as system in package are disclosed. The system in package has a substrate ( 102 ) with a plurality of passive devices ( 104 ) mounted thereon. A molding compound ( 106 ) envelopes the plurality of passive devices ( 104 ) to define a flat surface ( 116 ) substantially parallel to a surface of the substrate ( 102 ). A plurality of integrated circuit dies ( 110 ) is coupled successively to the flat surface ( 116 ).

Claims (50)

1. A system in package comprising:

a substrate;

a plurality of passive devices mounted on the substrate;

a molding compound enveloping the plurality of passive devices to define an enclosed platform, wherein the enclosed platform has a flat surface substantially parallel to a surface of the substrate, wherein one or more passive devices of the plurality of passive devices has a thickness that is different than a thickness of the other passive devices of the plurality of passive devices, and wherein the flat surface of the enclosed platform occupies an x-y space; and

a plurality of integrated circuit dies disposed on the flat surface of the enclosed platform, wherein each of the plurality of integrated circuit dies has a width that is less than a width of the enclosed platform, wherein the plurality of integrated circuit dies are not encased within the molding compound of the enclosed platform, wherein the plurality of integrated circuit dies are coupled successively to the flat surface of the enclosed platform, wherein the plurality of integrated circuit dies comprises a first die, a second die, and a third die stacked in a stair configuration, and wherein a combination of the first die, the second die, and the third die has a footprint within the x-y space occupied by the flat surface of the enclosed platform.

2. The system in package of claim 1 wherein the substrate is a printed circuit board.

3. The system in package of claim 1 further comprising:

at least one application-specific integrated circuit (ASIC) coupled to the substrate and enveloped within the molding compound of the enclosed platform, wherein the at least one ASIC has a width that is less than the width of the plurality of integrated circuit dies.

4. The system in package of claim 1 wherein each integrated circuit die of the plurality of integrated circuit dies has substantially a same thickness.

5. The system in package of claim 1 further comprising:

a second plurality of passive devices coupled to the surface of the substrate, wherein the second plurality of passive devices are not encased within the molding compound of the enclosed platform.

6. The system in package of claim 5 wherein the thickness of the one or more passive devices of the plurality of the passive devices is different than a thickness of the second plurality of passive devices.

7. The system in package of claim 1 further comprising:

a layer of die-attached film coupling a first integrated circuit die to the flat surface of the enclosed platform and successive layers of die-attached film coupling together successive dies of the plurality of integrated circuit dies.

8. The system in package of claim 7 wherein each layer of the die-attached film has substantially a same thickness.

9. The system in package of claim 1 wherein the molding compound is an epoxy resin.

10. A method of making a system in package comprising:

mounting a plurality of passive devices on a substrate;

molding an enclosed platform enveloping the plurality of passive devices, the enclosed platform having a substantially planar surface substantially parallel to a surface of the substrate, wherein one or more passive devices of the plurality of passive devices has a thickness that is different than a thickness of the other passive devices of the plurality of passive devices, and wherein the substantially planar surface of the enclosed platform occupies an x-y space;

coupling a first integrated circuit die onto the substantially planar surface of the enclosed platform; and

coupling a plurality of integrated circuit dies successively to the first integrated circuit die to form a die stack, wherein the first integrated circuit die and each of the plurality of integrated circuit dies have a width that is less than a width of the enclosed platform, wherein the die stack is not encased within the enclosed platform, wherein the plurality of integrated circuit dies comprises a second integrated circuit die, and a third integrated circuit die, wherein the first integrated circuit die, the second integrated circuit die, and the third integrated circuit die are stacked in a stair configuration, and wherein a combination of the first integrated circuit die, the second integrated circuit die, and the third integrated circuit die has a footprint within the x-y space occupied by the substantially planar surface of the enclosed platform.

11. The method of claim 10 further comprising:

wire bonding the plurality of integrated circuit dies to the substrate.

12. The method of claim 10 further comprising:

coupling an application-specific integrated circuit (ASIC) to the substrate prior to the molding, wherein the ASIC is enveloped within the enclosed platform, and wherein the ASIC has a width that is less than the width of both the first integrated circuit die and the plurality of integrated circuit dies.

13. The method of claim 10 wherein molding comprising:

overlaying a mold over the plurality of passive devices;

introducing a molding compound into the mold through a pin gate;

curing the molding compound.

14. The method of claim 10 wherein molding comprising:

introducing a mold that defines a molding channel encompassing the passive devices; and

flowing a molding compound along the channel; and

curing the molding compound.

15. The method of claim 14 further comprising:

encapsulating the passive devices and the ASIC within a unitary package; and

coupling a second plurality of passive devices to the surface of the substrate, wherein the second plurality of passive devices are not encased within the molding compound of the enclosed platform, and wherein the thickness of the one or more passive devices of the plurality of the passive devices is different than a thickness of the second plurality of passive devices.

16. A system comprising:

a system in package including:

a substrate;

a plurality of passive devices mounted on the substrate;

a molding compound enveloping the plurality of passive devices to define an enclosed platform, wherein the enclosed platform has a flat surface substantially parallel to a surface of the substrate, wherein one or more passive devices of the plurality of passive devices has a thickness that is different than a thickness of the other passive devices of the plurality of passive devices, and wherein the flat surface of the enclosed platform occupies an x-y space; and

a plurality of memory integrated circuit dies disposed on the flat surface of the enclosed platform, wherein each of the plurality of memory integrated circuit dies has a width that is less than a width of the enclosed platform, wherein the plurality of memory integrated circuit dies are not encased within the molding compound of the enclosed platform, wherein the plurality of memory integrated circuit dies are coupled successively to the flat surface of the enclosed platform, wherein the plurality of memory integrated circuit dies comprises a first die, a second die, and a third die stacked in a stair configuration, and wherein a combination of the first die, the second die, and the third die has a footprint within the x-y space occupied by the flat surface of the enclosed platform;

a display; and

a microphone input device.

17. The system of claim 16 wherein the display comprises:

a touch screen.

18. The system of claim 16 wherein the system in package further comprises:

a second plurality of passive devices coupled to the surface of the substrate, wherein the second plurality of passive devices are not encased within the molding compound of the enclosed platform.

19. The system of claim 16 wherein the system in package further comprises:

an application-specific integrated circuit (ASIC) coupled to the substrate and enveloped within the molding compound of the enclosed platform, wherein the ASIC has a width that is less than the width of the plurality of memory integrated circuit dies.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072890/0413 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: GUO, MAO; MEYERS, JOHN G.; SHE, YONG; LIN, BIN; TAN, LINGYAN L.
To: INTEL CORPORATION
Reel/Frame 053766/0190 →
Continuity (1)
Related Publication 20180331004A1 · Nov 15, 2018