IP Library › Granted Patent US 10,269,833

Granted Patent B2

US 10,269,833 · App. 15/810,228 · Granted Apr 23, 2019

Semiconductor device and display device

Inventors: Hajime Kimura (Kanagawa, JP); Atsushi Umezaki (Kanagawa, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

H01L27/1225 G02F1/1339 G02F1/1368 G02F1/13306 G02F1/136213 G02F1/136286 G11C19/28 H01L27/088 H01L27/124 H01L27/127 H01L27/1244 H01L27/1251 H01L27/1255 H01L27/1288 H01L29/41733 H01L29/42384 H01L29/7869 H01L29/78696 G02F1/133345 G02F1/134309 G02F2001/133302 G02F2201/121 G02F2201/123 G09G3/3677 G09G2310/0251 G09G2310/08 G09G2330/021

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Quick Facts

Patent No.: US 10,269,833
App. No.: 15/810,228
Granted: Apr 23, 2019
Kind: B2

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Abstract

A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.

Claims (66)

1. A semiconductor device comprising:

a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor,

wherein one of a source and a drain of the first transistor is electrically connected to a first wiring,

wherein the other of the source and the drain of the first transistor is electrically connected to a second wiring,

wherein one of a source and a drain of the second transistor is electrically connected to a third wiring,

wherein the other of the source and the drain of the second transistor is electrically connected to the second wiring,

wherein one of a source and a drain of the third transistor is electrically connected to a fourth wiring,

wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the first transistor,

wherein one of a source and a drain of the fourth transistor is electrically connected to a fifth wiring,

wherein the other of the source and the drain of the fourth transistor is electrically connected to a gate of second transistor,

wherein one of a source and a drain of the fifth transistor is electrically connected to a sixth wiring,

wherein the other of the source and the drain of the fifth transistor is electrically connected to the gate of second transistor,

wherein one of a source and a drain of the sixth transistor is electrically connected to the fifth wiring,

wherein the one of the source and the drain of the sixth transistor is electrically connected a gate of the sixth transistor,

wherein the other of the source and the drain of the sixth transistor is electrically connected to a gate of the fourth transistor, and

wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor have a same polarity.

2. The semiconductor device according to claim 1 ,

wherein a channel width of the first transistor is longer than a channel width of the third transistor,

wherein the channel width of the third transistor is longer than a channel width of the second transistor,

wherein the channel width of the second transistor is longer than a channel width of the fifth transistor, and

wherein the channel width of the fifth transistor is longer than a channel width of the fourth transistor.

3. The semiconductor device according to claim 2 ,

wherein the channel width of the first transistor is less than five times the channel width of the third transistor,

wherein the channel width of the second transistor is less than five times the channel width of the fourth transistor, and

wherein the channel width of the fourth transistor is less than twenty times the channel width of the sixth transistor.

4. The semiconductor device according to claim 1 ,

wherein the fourth transistor comprises a first conductive layer, a second conductive layer and a third conductive layer,

wherein the first conductive layer comprises a region functioning as one of a source and a drain of the fourth transistor,

wherein the second conductive layer comprises a region functioning as other of a source and a drain of the fourth transistor,

wherein the third conductive layer comprises a region functioning as a gate of the fourth transistor, and

wherein an area of a region where the second conductive layer and the third conductive layer overlap is larger than an area of a region where the first conductive layer and the third conductive layer overlap.

5. The semiconductor device according to claim 1 , wherein the fifth wiring is inputted a first signal.

6. A semiconductor device comprising:

a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor,

wherein one of a source and a drain of the first transistor is electrically connected to a first wiring,

wherein the other of the source and the drain of the first transistor is electrically connected to a second wiring,

wherein one of a source and a drain of the second transistor is electrically connected to a third wiring,

wherein the other of the source and the drain of the second transistor is electrically connected to the second wiring,

wherein one of a source and a drain of the third transistor is electrically connected to a fourth wiring,

wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the first transistor,

wherein one of a source and a drain of the fourth transistor is electrically connected to a fifth wiring,

wherein the other of the source and the drain of the fourth transistor is electrically connected to a gate of second transistor;

wherein one of a source and a drain of the fifth transistor is electrically connected to a sixth wiring,

wherein the other of the source and the drain of the fifth transistor is electrically connected to the gate of second transistor,

wherein one of a source and a drain of the sixth transistor is electrically connected to the fifth wiring,

wherein the one of the source and the drain of the sixth transistor is electrically connected to a gate of the sixth transistor,

wherein the other of the source and the drain of the sixth transistor is electrically connected to a gate of the fourth transistor,

wherein one of a source and a drain of the seventh transistor is electrically connected to the sixth wiring,

wherein the other of the source and the drain of the seventh transistor is electrically connected to the gate of the fourth transistor, and

wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor have a same polarity.

7. The semiconductor device according to claim 6 ,

wherein a channel width of the first transistor is longer than a channel width of the third transistor,

wherein the channel width of the third transistor is longer than a channel width of the second transistor,

wherein the channel width of the second transistor is longer than a channel width of the fifth transistor, and

wherein the channel width of the fifth transistor is longer than a channel width of the fourth transistor.

8. The semiconductor device according to claim 7 ,

wherein the channel width of the first transistor is less than five times the channel width of the third transistor,

wherein the channel width of the second transistor is less than five times the channel width of the fourth transistor, and

wherein the channel width of the fourth transistor is less than twenty times the channel width of the sixth transistor.

9. The semiconductor device according to claim 6 ,

wherein the fourth transistor comprises a first conductive layer, a second conductive layer and a third conductive layer,

wherein the first conductive layer comprises a region functioning as one of a source and a drain of the fourth transistor,

wherein the second conductive layer comprises a region functioning as other of a source and a drain of the fourth transistor,

wherein the third conductive layer comprises a region functioning as a gate of the fourth transistor, and

10. The semiconductor device according to claim 6 , wherein the fifth wiring is inputted a first signal.

Assignments (1)

ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2018

From: KIMURA, HAJIME; UMEZAKI, ATSUSHI

To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Reel/Frame 044636/0415 →

Priority Claims (1)

JP 2009-209099 · Sep 10, 2009 · national

Continuity (5)

Continuation 15334397 · Oct 26, 2016

Continuation 15231851 · Aug 9, 2016

Continuation 14658403 · Mar 16, 2015

Continuation 12875808 · Sep 3, 2010

Related Publication 20180076232A1 · Mar 15, 2018

Cited By (3)

US 12,190,842 US 12,211,569 US 12,406,605