Dual channel CMOS having common gate stacks
Embodiments are directed to a method and resulting structures for a dual channel complementary metal-oxide-semiconductor (CMOS) having common gate stacks. A first semiconductor fin is formed on a substrate. A second semiconductor fin is formed adjacent to the first semiconductor fin on the substrate. An oxide layer is formed over the first and second semiconductor fins and annealed at a temperature effective to increase a germanium concentration of the second semiconductor fin. The annealing process is selective to the second semiconductor fin and does not increase a germanium concentration of the first semiconductor fin.
1. A method for forming a semiconductor device, the method comprising:
forming a first semiconductor fin on a substrate;
forming a second semiconductor fin on the substrate;
forming an oxide layer over the first and second semiconductor fins; and
annealing the oxide layer at a temperature effective to increase a germanium concentration of the second semiconductor fin;
wherein said annealing does not increase a germanium concentration of the first semiconductor fin.
2. The method of claim 1 , wherein the oxide layer comprises germanium.
3. The method of claim 2 , wherein increasing the germanium concentration of the second semiconductor fin further comprises condensing the germanium in the oxide layer into a portion of the second semiconductor fin.
4. The method of claim 1 , wherein the second semiconductor fin comprises silicon germanium.
5. The method of claim 4 , wherein increasing the germanium concentration of the second semiconductor fin further comprises oxidizing the silicon in the second semiconductor fin.
6. The method of claim 1 further comprising forming a shared conductive gate over a channel region of the first and second semiconductor fins.
7. The method of claim 6 , wherein the shared conductive gate comprises a TiN/TiAlC/TiN gate stack.
8. The method of claim 1 , wherein the first semiconductor fin comprises silicon and the second semiconductor fin comprises silicon germanium.
9. The method of claim 8 , wherein prior to said annealing the second semiconductor fin further comprises a germanium concentration of about 20 atomic percent.
10. The method of claim 9 , wherein after said annealing the second semiconductor fin further comprises a germanium concentration of about 40 atomic percent.
11. A method for forming a dual channel complementary metal-oxide-semiconductor (CMOS) device, the method comprising:
recessing a portion of a silicon substrate;
forming a semiconductor layer comprising silicon germanium on the recessed portion of the silicon substrate;
forming a first semiconductor fin over an unrecessed portion of the substrate;
forming a second semiconductor fin over the semiconductor layer;
forming an oxide layer comprising germanium over the first and second semiconductor fins;
annealing the oxide layer at a temperature effective to increase a germanium concentration of the second semiconductor fin; and
forming a shared conductive gate over a channel region of the first and second semiconductor fins.
12. The method of claim 11 , wherein the second semiconductor fin comprises silicon germanium.
13. The method of claim 11 , wherein the shared conductive gate comprises a TiN/TiAlC/TiN gate stack.
14. The method of claim 11 , wherein prior to said annealing the second semiconductor fin further comprises a germanium concentration of about 20 atomic percent.
15. The method of claim 14 , wherein after said annealing the second semiconductor fin further comprises a germanium concentration of about 40 atomic percent.
16. A method for forming a semiconductor device, the method comprising:
forming a semiconductor fin comprising silicon and germanium on a substrate;
forming an oxide layer comprising germanium over the semiconductor fin; and
annealing the oxide layer at a temperature effective to increase a germanium concentration of the semiconductor fin;
wherein said annealing oxidizes silicon in the semiconductor fin according to the reaction:
Si+Ge+2 GeO 2 →SiO 2 +Ge+GeO. (I)