IP Library Granted Patent US 10,915,440
Granted Patent B2
US 10,915,440 · App. 15/814,785 · Granted Feb 9, 2021

Namespace mapping optimization in non-volatile memory devices

Inventor: Alex Frolikov (San Jose, CA)
Assignee: Micron Technology, Inc.
G06F12/0246G06F3/061G06F3/064G06F3/0679G06F2212/7201
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Quick Facts
Patent No.
US 10,915,440
App. No.
15/814,785
Granted
Feb 9, 2021
Kind
B2
Abstract

A computer storage device having a host interface, a controller, non-volatile storage media, and firmware. The firmware instructs the controller to: store a namespace map to map blocks of logical addresses defined in a namespace to first blocks of logical addresses defined in a capacity of the non-volatile storage media; without changing a size of the namespace, adjust the namespace map to map the blocks of the logical addresses defined in the namespace to second blocks of the logical addresses defined in the capacity of the non-volatile storage media (e.g., to consolidate blocks for performance improvement); and translate the logical addresses in the namespace to physical addresses for the non-volatile storage media using the namespace map.

Claims (55)

1. A computer storage device, comprising:

a host interface;

a controller;

non-volatile storage media; and

firmware containing instructions which, when executed by the controller, instruct the controller to at least:

divide a logical address space of the non-volatile storage media into a set of first blocks of logical addresses, at least two first blocks comprising a set of contiguous logical addresses;

map a plurality of namespaces to the first blocks of logical addresses, the mapping comprising mapping non-contiguous blocks of the first blocks to each namespace, the mapping of a respective namespace comprising:

mapping a first set of full blocks from the first blocks of logical addresses,

determining a difference between a size of the first set of full blocks and the size of the respective namespace, and

mapping at least one partial block to the respective namespace, the at least one partial block having an available size equal to or greater than the difference;

store a namespace map based on the mapping, the namespace map storing a list of pointers to each of the non-contiguous blocks;

adjust the namespace map without changing a size of the namespace, the adjusting comprising performing at least one re-mapping of logic block addresses defined in the namespace to other logical addresses defined in a capacity of the non-volatile storage media; and

translate logical addresses in the namespace to physical addresses for the non-volatile storage media using the namespace map.

2. The computer storage device of claim 1 , wherein the namespace map is adjusted to map the blocks of logical addresses defined in the namespace to second blocks of logical addresses defined in the capacity of the non-volatile storage media.

3. The computer storage device of claim 2 , wherein logical addresses in the first blocks are not contiguous; and the logical addresses in the second blocks are contiguous.

4. The computer storage device of claim 2 , wherein computation of mapping logical addresses defined in the namespace to logical addresses defined in the capacity is reduced after an adjustment from mapping to the first blocks to mapping to the second blocks.

5. The computer storage device of claim 4 , wherein the blocks of the logical addresses have a same predetermined block size.

6. The computer storage device of claim 5 , wherein the predetermined block size is a power of two.

7. The computer storage device of claim 2 , wherein sequential logical addresses in the namespace are mapped to sequential logical addresses in the second blocks of logical addresses defined in the capacity of the non-volatile storage media.

8. The computer storage device of claim 2 , wherein the second blocks have at least one fewer partial block than the first blocks; and each partial block is identified in the namespace map as a portion of a block of a predetermined number of logical addresses defined in the capacity of the non-volatile storage media.

9. The computer storage device of claim 2 , wherein the namespace map is adjusted to consolidate, in a contiguous region in the capacity, two or more free blocks of logical addresses defined in the capacity of the non-volatile storage media; and the two or more free blocks are available for allocation to a new namespace.

10. The computer storage device of claim 2 , wherein the namespace map is adjusted in a background process.

11. The computer storage device of claim 10 , wherein the namespace map is adjusted via:

adjusting mapping from logical addresses defined in the capacity of the non-volatile storage media and physical addresses in the non-volatile storage media.

12. The computer storage device of claim 11 , wherein when logical addresses defined in the namespace are mapped to the first blocks of logical addresses, the first blocks of logical addresses are mapped to a set of physical addresses; and when the namespace map is adjusted to map the logical addresses defined in the namespace to the second blocks of logical addresses, the second blocks of logical addresses are remapped to the set of physical addresses.

13. The computer storage device of claim 10 , wherein the namespace map is adjusted via:

mirroring data stored in a first portion of the non-volatile storage media identified by logical addresses in the first blocks onto a second portion of the non-volatile storage media identified by logical addresses in the second blocks.

14. The computer storage device of claim 10 , wherein before the namespace is adjusted, the first blocks include:

a first set of logical addresses corresponding to a first portion of the non-volatile storage media; and

a second set of logical addresses corresponding to a second portion of the non-volatile storage media; and

wherein after the namespace is adjusted, the second blocks include:

a third set of logical addresses corresponding to the first portion of the non-volatile storage media; and

a fourth set of logical addresses corresponding to a third portion of the non-volatile storage media; and

wherein the namespace map is adjusted via mirroring or copying data stored in the second portion of the non-volatile storage media onto the third portion of the non-volatile storage media.

15. A method implemented in a computer storage device having a non-volatile storage media, the method comprising:

dividing a logical address space of the non-volatile storage media into a set of first blocks of logical addresses, at least two first blocks comprising a set of contiguous logical addresses;

mapping a plurality of namespaces to the first blocks of logical addresses, the mapping comprising mapping non-contiguous blocks of the first blocks to each namespace, the mapping of a respective namespace comprising:

mapping a first set of full blocks from the first blocks of logical addresses, determining a difference between a size of the first set of full blocks and the size of the respective namespace, and

mapping at least one partial block to the respective namespace, the at least one partial block having an available size equal to or greater than the difference;

storing namespace data based on the mapping, the namespace data storing a list of pointers to each of the non-contiguous blocks;

adjusting, without changing a size of the named portion of a capacity of the non-volatile storage media, the namespace data to map the blocks of the logical addresses defined in the named portion of the capacity of the non-volatile storage media to second blocks of the logical addresses defined in the entire capacity of the non-volatile storage media, the second blocks distinct from the first blocks; and

translating the logical addresses defined in the named portion to physical addresses for the non-volatile storage media.

16. The method of claim 15 , wherein the computer storage device has a plurality of named portions of the capacity of the non-volatile storage media.

17. The method of claim 16 , wherein the adjusting includes changing mapping between the logical addresses defined in the entire capacity of the non-volatile storage media and the physical addresses.

18. The method of claim 16 , wherein the adjusting removes a gap in logical addresses in the first blocks.

19. The method of claim 16 , wherein the adjusting removes a gap in free blocks of the logical addresses defined in the entire capacity of the non-volatile storage media; and wherein the free blocks are available for allocation to a new named portion of the capacity of the non-volatile storage media.

20. A non-transitory computer storage medium storing instructions which, when executed by a controller of a computer storage device having a non-volatile storage media, cause the controller to perform a method, the method comprising:

dividing a logical address space of the non-volatile storage media into a set of first blocks of logical addresses, at least two first blocks comprising a set of contiguous logical addresses;

mapping a plurality of namespaces to the first blocks of logical addresses, the mapping comprising mapping non-contiguous blocks of the first blocks to each namespace, the mapping of a respective namespace comprising:

mapping a first set of full blocks from the first blocks of logical addresses,

determining a difference between a size of the first set of full blocks and the size of the respective namespace, and

mapping at least one partial block to the respective namespace, the at least one partial block having an available size equal to or greater than the difference;

storing namespace data based on the mapping, the namespace data storing a list of pointers to each of the non-contiguous blocks;

adjusting, without changing a size of the named portion of a capacity of the non-volatile storage media, the namespace data to map the blocks of the logical addresses defined in the named portion of the capacity of the non-volatile storage media to second blocks of the logical addresses defined in the entire capacity of the non-volatile storage media, the second blocks distinct from the first blocks; and

translating the logical addresses defined in the named portion to physical addresses for the non-volatile storage media.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050716/0678 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2018
From: FROLIKOV, ALEX
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046979/0970 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 7 TO PATENT SECURITY AGREEMENT Recorded Feb 6, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 045267/0833 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2017
From: FROLIKOV, ALEX
To: MICRON TECHNOLOGY, INC.
Reel/Frame 044242/0065 →
Continuity (1)
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